pnl_cmo20_vga.h

mstar 776 开发的车载dvd

/******************************************************************************
 Copyright (c) 2003 MStar Semiconductor, Inc.
 All rights reserved.

 [Module Name]: Pnl_CMO20.h
 [Date]:        15-Mar-2004
 [Comment]:
   Panel parameters.[V201V2]
 [Reversion History]:
*******************************************************************************/
#ifndef __CMO20_VGA_H
#define __CMO20_VGA_H

#include "board.h"
#include "analog_reg.h"

///////////////////////////////////////////////
// Common setting
///////////////////////////////////////////////
#define PANEL_NAME			"CMO TTL 20 VGA"
#define PANEL_DOT_WIDTH 	637.5		// unit: um
#define PANEL_DOT_HEIGHT	637.5		// unit: um

#define USE_PRIVATE_GAMMA_TABLE
#define USE_CUSTOMER_COLOR_SETTING 0

#define PANEL_ASPECT_RATIO_4_3     0
#define PANEL_ASPECT_RATIO_WIDE    1
#define PANEL_ASPECT_RATIO_OTHER   2


#define PANEL_ASPECT_RATIO  PANEL_ASPECT_RATIO_4_3

///////////////////////////////////////////////
// Enable function
///////////////////////////////////////////////
#define _PNL_FUNC_EN_				-1

//////////////////////////////////////////////
// Panel output
//////////////////////////////////////////////
#define PANEL_DITHER				_PNL_FUNC_EN_ // 8/6 bits panel

#define PANEL_TTL					_PNL_FUNC_EN_
#define PANEL_DTCON              0//_PNL_FUNC_EN_
#define PANEL_ATCON       0
#define PANEL_LVDS              0//_PNL_FUNC_EN_
#define PANEL_RSDS              0
#define PANEL_LTCON             0


#define PANEL_DUAL_PORT			0
#define PANEL_SWAP_PORT			0
#define PANEL_SWAP_ODD_ML			0// _PNL_FUNC_EN_
#define PANEL_SWAP_EVEN_ML		0// _PNL_FUNC_EN_
#define PANEL_SWAP_ODD_RB			0
#define PANEL_SWAP_EVEN_RB		0

#define PANEL_SWAP_LVDS_POL		0
#define PANEL_SWAP_LVDS_CH		0

#define PANEL_LVDS_TI_MODE			0

#define PANEL_DCLK_DELAY        0x8             // Range (0~F)
#define PANEL_INV_DCLK          0//_PNL_FUNC_EN_   // Invert output DCLK
#define PANEL_INV_DE            0               // Invert output DE
#define PANEL_INV_VSYNC         0               // Invert output VSYNC
#define PANEL_INV_HSYNC         0               // Invert output HSYNC

// Lock Y line
#define PANEL_LOCK_Y_LINE           0
#define PANEL_SYNC_MODE_1           0
#define DISABLE_SHORT_FRAME_TUNE    0
#define DISABLE_SHORT_LINE_TUNE     1
///////////////////////////////////////////////
// Output tmming setting
///////////////////////////////////////////////
// driving current setting (0x00=4mA, 0x01=6mA, 0x02=8mA, 0x03=12mA)
#define PANEL_DCLK_CURRENT      0x03    // DCLK current
#define PANEL_DE_CURRENT        0x03    // DE signal current
#define PANEL_ODD_DATA_CURRENT  0x03    // odd data current
#define PANEL_EVEN_DATA_CURRENT 0x03    // even data current

#define PANEL_ON_TIMING1        25   // time between panel & data while turn on power
#define PANEL_ON_TIMING2        450  // time between data & back light while turn on power
#define PANEL_OFF_TIMING1       20  // time between back light & data while turn off power
#define PANEL_OFF_TIMING2       100   // time between data & panel while turn off power

#define PANEL_HSYNC_WIDTH       16
#define PANEL_HSYNC_BACK_PORCH  44

#define PANEL_VSYNC_WIDTH			2
#define PANEL_VSYNC_BACK_PORCH	32

#define PANEL_HSTART				(PANEL_HSYNC_WIDTH + PANEL_HSYNC_BACK_PORCH)
#define PANEL_VSTART				(PANEL_VSYNC_WIDTH + PANEL_VSYNC_BACK_PORCH)
#define PANEL_WIDTH				640
#define PANEL_HEIGHT				480
#define PANEL_HTOTAL				800
#define PANEL_VTOTAL				525

#define PANEL_MAX_HTOTAL			900
#define PANEL_MIN_HTOTAL			712
#define PANEL_MAX_VTOTAL			550
#define PANEL_MIN_VTOTAL			500
#define PANEL_DCLK					(((DWORD)PANEL_HTOTAL*PANEL_VTOTAL*60)/1000000)
#define PANEL_MAX_DCLK          30
#define PANEL_MIN_DCLK          20


///////////////////////////////////////////////////////
// TCON setting
///////////////////////////////////////////////////////
// PTC Mode setting
#define SET_PTC_MODE1           0x8C    // PTC_MODE1(0xD0) // 0x88
#define SET_PTC_MODE2           0x26    // PTC_MODE2(0xD1)
#define SET_PTC_MODE3           0x82    // PTC_MODE3(0xD2)

// PTC Timming Setting
#define SET_FRP_TRAN            0x02    // GPO_FRP_TRAN(0xDC)
#define SET_STH_START           0x68// kevin 071102_2//0x6F    // GPO_STH_START(0xDD)
#define SET_STH_WIDTH           0x01    // GPO_STH_WIDTH(0xDE)
#define SET_OEH_START           0x40// kevin 071102_2//0x6E    // GPO_OEH_START(0xDF)
#define SET_OEH_WIDTH           0x07    // GPO_OEH_WIDTH(0xE0)
#define SET_OEV_START           0x6C    // GPO_OEV_START(0xE1)
#define SET_OEV_WIDTH           0x29    // GPO_OEV_WIDTH(0xE2)
#define SET_CKV_START           0x60// kevin 071102_2//0x6D    // GPO_CKV_START(0xE3)
#define SET_CKV_START2          0x00    // GPO_CKV_START2(0xE4)
#define SET_CKV_WIDTH           0x1C    // GPO_CKV_WIDTH(0xE5)

#if ENABLE_NEW_VSYNC_MODE// kevin 071112_2
#define SET_STV_LINE_TH         0x44    // GPO_STV_LINE_TH(0xE6) // 0x6A
#else
#define SET_STV_LINE_TH         0x4F    // GPO_STV_LINE_TH(0xE6) // 0x6A
#endif

#define SET_STV_START           0x6A    // GPO_STV_START(0xE7)
#define SET_STV_WIDTH           0x00    // GPO_STV_WIDTH(0xE8)
#define SET_OEV2_START          0x00    // GPO_OEV2_START(0xE9)
#define SET_OEV3_START          0x00    // GPO_OEV3_START(0xEA)
#define SET_H_ST_DLY_L          0x00    // H_ST_DLY_L(0xEB)
#define SET_H_ST_DLY_H          0x00    // H_ST_DLY_H(0xEC)
#define SET_CLK_DLY_SYNC_OUT    0x00    // CLK_DLY_SYNC_OUT(0xED)
#define SET_CKV_END2            0x00    // GPO_CKV_END2(0xEE)
#define SET_Q1H                 0x00    // Q1H_SETTING(0xEF)


#define SET_OEV2_WIDTH          0x54    // GPO_OEV2_WIDTH(0xCD)
#define SET_OEV3_WIDTH          0x54    // GPO_OEV3_WIDTH(0xCE)
#define SET_OEV_DELTA           0x54    // GPO_OEV_DELTA(0xCF)

///////////////////////////////////////////////////////
// MOD setting
///////////////////////////////////////////////////////
#define SET_DTCON_OEN           0x0000  // DTCON output enable
#define SET_DTCON_SEL           0x01    // selection DTCON pad
#define SET_MOD_INV_HSYNC       0
#define SET_MOD_INV_VSYNC       0
#define SET_MOD_INV_DE          0
#define SET_MOD_INV_CLK         1

///////////////////////////////////////////////////////
// Backlight PWM setting
#define SET_BACKLIGHT_PWM       0xFF    // for Bk1.F4h initial setting

///////////////////////////////////////////////////////
// SSC setting
///////////////////////////////////////////////////////
//kevin OSD
#define SET_SSC_SPAN            0xEC
#define SET_SSC_STEP            0x19

///////////////////////////////////////////////////////
#define PANEL_DIMMING_CTL				0x80
#define PANEL_MAX_PWM_DIM				0xE6
#define PANEL_MIN_PWM_DIM				0x20

//////////////////////////////////////////////////
// DPWM // kevin 071217
//////////////////////////////////////////////////
#define ENABLE_DPWM_LED         0

#define VIN_STARTUP_H_THRD      0xC2
#define VIN_WRK_H_THRD          0xCB
#define VIN_WRK_L_THRD          0x3F
#define VIN_STARTUP_L_THRD      0x3C

#define ENABLE_BURST_MODE       0
#define ENABLE_VSYNC_MODE       0
#define SET_FAULTZ_HIGH         1
#define ENABLE_PWM_FUNC         0
#define VSYNC_PWM_MODE_SEL      ((ENABLE_PWM_FUNC<<3)|(SET_FAULTZ_HIGH<<2)|(ENABLE_VSYNC_MODE<<1)|(ENABLE_BURST_MODE))

#define FB2_STARTUP             0x00AA
#define FB2_SET                 FB2_STARTUP
#define FB2_CLAMP               0x00AA

#define STRK1_CNT               0x017F

#if ENABLE_DPWM_LED
#define STRK2_CNT               (STRK1_CNT + 0x20)
#else
#define STRK2_CNT               (STRK1_CNT - 0x30)
#endif

#define BURST_CLP               0x0114
#define BURST_DUTY              0x00C8

#endif	// __CMO20_VGA_H