📄 dac_crt.c
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{BK_MACE_A9, INIT_YPBPR_VPK_USER_ADJ},
{BK_MACE_AC, INIT_YPBPR_VPK_HOR_LUT_ADDR},
{BK_MACE_AD, INIT_YPBPR_VPK_HOR_LUT_DATA},
{BK_MACE_AE, INIT_YPBPR_VPK_DIA_LUT_ADDR},
{BK_MACE_AF, INIT_YPBPR_VPK_DIA_LUT_DATA},
{BK_MACE_B0, INIT_YPBPR_SNR_CTRL},
{BK_MACE_B1, INIT_YPBPR_GAUSS_THRD},
{BK_MACE_B2, INIT_YPBPR_FLESH_SLPE},
{BK_MACE_B3, INIT_YPBPR_FLESH_CB_U},
{BK_MACE_B4, INIT_YPBPR_FLESH_CR_U},
{BK_MACE_B5, INIT_YPBPR_FLESH_CB_D},
{BK_MACE_B6, INIT_YPBPR_FLESH_CR_D},
{BK_MACE_B7, INIT_YPBPR_GREEN_SLPE},
{BK_MACE_B8, INIT_YPBPR_GREEN_CB_U},
{BK_MACE_B9, INIT_YPBPR_GREEN_CR_U},
{BK_MACE_BA, INIT_YPBPR_GREEN_CB_D},
{BK_MACE_BB, INIT_YPBPR_GREEN_CR_D},
{BK_MACE_C0, INIT_YPBPR_SNR_TABLE_0},
{BK_MACE_C1, INIT_YPBPR_SNR_TABLE_1},
{BK_MACE_C2, INIT_YPBPR_SNR_TABLE_2},
{BK_MACE_C3, INIT_YPBPR_SNR_TABLE_3},
{BK_MACE_C4, INIT_YPBPR_SNR_TABLE_4},
{BK_MACE_C5, INIT_YPBPR_SNR_TABLE_5},
{BK_MACE_C6, INIT_YPBPR_SNR_TABLE_6},
{BK_MACE_C7, INIT_YPBPR_SNR_TABLE_7},
{_END_OF_TBL_, 0x00}
};
void devPanel_VDCombFinetune( MS_INPUT_SOURCE_TYPE enInputSourceType )
{
U8 u8Bank;
u8Bank = MDrv_ReadByte( BK_SELECT_00 );
MDrv_WriteByte( BK_SELECT_00, REG_BANK_COMB );
switch( enInputSourceType )
{
#if (ENABLE_SCART_VIDEO)
case INPUT_SOURCE_SCART:
#if (INPUT_SCART_VIDEO_COUNT == 2)
case INPUT_SOURCE_SCART2:
#endif
#endif
case INPUT_SOURCE_CVBS:
#if (INPUT_AV_VIDEO_COUNT == 2)
case INPUT_SOURCE_CVBS2:
#endif
MDrv_WriteRegBit( BK_COMB_10, DISABLE, _BIT7 ); // CVBS
MDrv_WriteByte( BK_COMB_20, 0x6D );
MDrv_WriteByte( BK_COMB_21, 0x89 );
MDrv_WriteByte( BK_COMB_22, 0x86 );
MDrv_WriteByte( BK_COMB_23, 0x01 );
MDrv_WriteByte( BK_COMB_24, 0x20 );
MDrv_WriteByte( BK_COMB_25, 0x04 );
MDrv_WriteByte( BK_COMB_26, 0x80 );
MDrv_WriteByte( BK_COMB_27, 0x80 );
MDrv_WriteByte( BK_COMB_28, 0x05 );
MDrv_WriteByte( BK_COMB_29, 0x80 );
MDrv_WriteByte( BK_COMB_2A, 0x0D );
MDrv_WriteByte( BK_COMB_2B, 0x04 );
MDrv_WriteByte( BK_COMB_2C, 0x04 );
MDrv_WriteByte( BK_COMB_2D, 0x00 );
MDrv_WriteByte( BK_COMB_2E, 0x0C );
MDrv_WriteByte( BK_COMB_2F, 0x08 );
MDrv_WriteByte( BK_COMB_60, 0x00 );
MDrv_WriteByte( BK_COMB_61, 0xAE );
MDrv_WriteByte( BK_COMB_70, 0xD0 );
MDrv_WriteByte( BK_COMB_71, 0x10 );
MDrv_WriteByte( BK_COMB_72, 0xA0 );
MDrv_WriteByte( BK_COMB_73, 0x88 );
MDrv_WriteByte( BK_COMB_74, 0x80 );
MDrv_WriteByte( BK_COMB_75, 0x90 );
MDrv_WriteByte( BK_COMB_77, 0x30 );
MDrv_WriteByte( BK_COMB_80, 0xA0 );
MDrv_WriteByte( BK_COMB_81, 0x96 );
MDrv_WriteByte( BK_COMB_82, 0x6A );
MDrv_WriteByte( BK_COMB_83, 0x10 );
MDrv_WriteByte( BK_COMB_84, 0x66 );
MDrv_WriteByte( BK_COMB_85, 0x66 );
MDrv_WriteByte( BK_COMB_8B, 0x40 );
MDrv_WriteByte( BK_COMB_8C, 0x6B );
MDrv_WriteByte( BK_COMB_8D, 0x78 );
MDrv_WriteByte( BK_COMB_8E, 0x78 );
MDrv_WriteByte( BK_COMB_8F, 0x80 );
MDrv_WriteByte( BK_COMB_9B, 0x6B );
MDrv_WriteByte( BK_COMB_9C, 0x00 );
MDrv_WriteByte( BK_COMB_9D, 0x66 );
MDrv_WriteByte( BK_COMB_9E, 0x78 );
MDrv_WriteByte( BK_COMB_9F, 0x78 );
MDrv_WriteByte( BK_COMB_AB, 0x78 );
MDrv_WriteByte( BK_COMB_AC, 0x66 );
MDrv_WriteByte( BK_COMB_AD, 0x00 );
MDrv_WriteByte( BK_COMB_AE, 0x66 );
MDrv_WriteByte( BK_COMB_AF, 0x78 );
MDrv_WriteByte( BK_COMB_BB, 0x78 );
MDrv_WriteByte( BK_COMB_BC, 0x78 );
MDrv_WriteByte( BK_COMB_BD, 0x66 );
MDrv_WriteByte( BK_COMB_BE, 0x00 );
MDrv_WriteByte( BK_COMB_BF, 0x6B );
MDrv_WriteByte( BK_COMB_CB, 0x80 );
MDrv_WriteByte( BK_COMB_CC, 0x78 );
MDrv_WriteByte( BK_COMB_CD, 0x78 );
MDrv_WriteByte( BK_COMB_CE, 0x6B );
MDrv_WriteByte( BK_COMB_CF, 0x00 );
break;
case INPUT_SOURCE_SVIDEO:
#if (INPUT_SV_VIDEO_COUNT == 2)
case INPUT_SOURCE_SVIDEO2:
#endif
MDrv_WriteRegBit( BK_COMB_10, ENABLE, _BIT7 ); // SV
MDrv_WriteByte( BK_COMB_20, 0x6D );
MDrv_WriteByte( BK_COMB_21, 0x89 );
MDrv_WriteByte( BK_COMB_22, 0x86 );
MDrv_WriteByte( BK_COMB_23, 0x01 );
MDrv_WriteByte( BK_COMB_24, 0x20 );
MDrv_WriteByte( BK_COMB_25, 0x04 );
MDrv_WriteByte( BK_COMB_26, 0x80 );
MDrv_WriteByte( BK_COMB_27, 0x80 );
MDrv_WriteByte( BK_COMB_28, 0x05 );
MDrv_WriteByte( BK_COMB_29, 0x80 );
MDrv_WriteByte( BK_COMB_2A, 0x0D );
MDrv_WriteByte( BK_COMB_2B, 0x04 );
MDrv_WriteByte( BK_COMB_2C, 0x04 );
MDrv_WriteByte( BK_COMB_2D, 0x00 );
MDrv_WriteByte( BK_COMB_2E, 0x0C );
MDrv_WriteByte( BK_COMB_2F, 0x08 );
MDrv_WriteByte( BK_COMB_60, 0x00 );
MDrv_WriteByte( BK_COMB_61, 0xAE );
MDrv_WriteByte( BK_COMB_70, 0xD0 );
MDrv_WriteByte( BK_COMB_71, 0x10 );
MDrv_WriteByte( BK_COMB_72, 0xA0 );
MDrv_WriteByte( BK_COMB_73, 0x88 );
MDrv_WriteByte( BK_COMB_74, 0x80 );
MDrv_WriteByte( BK_COMB_75, 0x90 );
MDrv_WriteByte( BK_COMB_77, 0x30 );
MDrv_WriteByte( BK_COMB_80, 0xA0 );
MDrv_WriteByte( BK_COMB_81, 0x96 );
MDrv_WriteByte( BK_COMB_82, 0x6A );
MDrv_WriteByte( BK_COMB_83, 0x10 );
MDrv_WriteByte( BK_COMB_84, 0x66 );
MDrv_WriteByte( BK_COMB_85, 0x66 );
break;
default:
break;
}
MDrv_WriteByte( BK_SELECT_00, u8Bank );
}
//------------------------------------------------------------------------------
////////////////////////////////////////////////////
// output timing selection
////////////////////////////////////////////////////
code PanelDataType tPanelOutData[PANEL_SELECT_NUMS] =
{
//DAC_FOR_PAL_3375K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
6, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
562, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_NTSC_3375K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
6, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
562, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
#if 1
//DAC_FOR_VGA_3375K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64, // HSyncWidth
70, // HSyncBackPorch
19, // VSyncWidth
6, // VSyncBackPorch
720, // DeWidth
530, // DeHeight
928, // HTotal
562, // VTotal
31.320, // OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
NULL, //ExtendFlag
},
#else
//DAC_FOR_VGA_3375K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
19, // VSyncWidth
6, // VSyncBackPorch
1370,//720, // DeWidth
530, // DeHeight
928*2, // HTotal
562, // VTotal
31.320*2, // OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
#endif
//DAC_FOR_YPBPR_3375K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
8, // VSyncBackPorch
1370, // DeWidth
536, // DeHeight
928*2, // HTotal
562, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0)|(PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_PAL_3375K_75I
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
433, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_NTSC_3375K_90I
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
361, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_PAL_3375K_100I
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
338, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_NTSC_3375K_120I
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
282, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//DAC_FOR_NTSC_3375K_60I
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
12, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
540, // DeHeight
928*2, // HTotal
561, // VTotal
31.302*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
PANEL_REDUCE_DE_SIZE_BIT | PANEL_DOUBLE_OSD_X_BIT, //ExtendFlag
},
//-----------------------------------------------------------------------------------------------------------------------------
//-----------------------------------------------------------------------------------------------------------------------------
#ifdef MULTI_HSYNC
//DAC_FOR_PAL_315K
{
0 , // DEVstar
0x00, // HsyncShiftOffset
64*2, // HSyncWidth
100*2, // HSyncBackPorch
19, // VSyncWidth
1, // VSyncBackPorch
1370, // DeWidth
480, // DeHeight
928*2, // HTotal
525, // VTotal
29.232*2,// OuputDClk
((PANEL_DAC_INTERLACE_BIT & 0) | (PANEL_DAC_I1440_MODE_BIT & 0) | (PANEL_DAC_INV_FIELD_BIT & 0 | PANEL_DAC_SHIFT_RIGHT_BIT & 0)),
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