mst037f_c01_gpio.c

mstar 776 开发的车载dvd

#include "mreg51.h"
#include "sysinfo.h"
#include "hwreg.h"
#include "drvuart.h"
#include "drvmiu.h"
#include "drvsys.h"
#include "Analog_Reg.h"
#include "drvGlobal.h"
#include "drvISR.h"
#include "drviic.h"

#include <stdio.h>

#include "DrvGpio.h"

//---------------------------------------------------------------------
//#define DI_PORT_SEL                  NO_DI_PORT
//#define DI_PORT_IO_SET               NULL

#define TS_PORT_SEL                  TS_PORT_IS_TS

#define IR_PORT_SEL                   (IR_USE_PAD_IRIN2|INT_USE_PAD_INT2)
#define IRIN2_INT2_IS_GPIO            (BIT0|BIT1)
#define IRIN_INT_IS_GPIO            (BIT6|BIT7)

#define HS_VS_VD_DE_IO_SETTING      0x00    //all output


//---------------------------------------------------------------------
void Initial2338_IR_Port( void )
{
    XBYTE[REG_MUX_CONFIG_2] |= IR_PORT_SEL;

    XBYTE[REG_MUX_FUNC_SEL2]=(XBYTE[REG_MUX_FUNC_SEL2] & 0x3f )|IRIN_INT_IS_GPIO;
    XBYTE[REG_MUX_FUNC_SEL3] &= (~IRIN2_INT2_IS_GPIO);
    XBYTE[REG_GPIO_OE_0] &= (~ (BIT4|BIT3) );
}
//---------------------------------------------------------------------
void Initial2338_UART1_Port(void )	  //gpio 0/1/2	& Pin208 (GPIO14)
{
		XBYTE[REG_MUX_CONFIG_3] &= ~(SECOND_UART_MODE); //UART1 not enable
        XBYTE[REG_GPIO_OE_1]&=~BIT6;      //default set to input

/*    XBYTE[REG_MUX_FUNC_SEL0] &= (~ATCON_SETTING);
    //Assign as GPIO
    XBYTE[REG_MUX_CONFIG_3] &= ~(SECOND_UART_MODE); //UART1 not enable
    XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);        //XBYTE[0x1ea1] &=0xe7;   //disable CEC
    XBYTE[REG_P1_ENABLE] &=~(BIT2|BIT1|BIT0);
    XBYTE[REG_MUX_FUNC_SEL0] &=0xf3;            //atcon_setting=00b
    XBYTE[REG_GPIO_OE_0] &= ~(BIT2|BIT1);   //output port

    XBYTE[REG_GPIO_OE_1] &= ~(BIT6);   //GPIO14 is output port
//*/
}
//---------------------------------------------------------------------
void Initial2338_Pin134_to_GPIO15 (void )	  //pin 134 in 2338
{
/*    XBYTE[REG_MUX_CONFIG_4] =(XBYTE[REG_MUX_CONFIG_4] & (~FCIE_CONFIG));
    XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);
	XBYTE[REG_MUX_FUNC_SEL3]|=(FLHWE_IS_GPIO);

    XBYTE[REG_GPIO_OE_1] &= ~(BIT7);   //GPIO15 is output port
//*/
     XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);
     XBYTE[REG_MUX_CONFIG_4]  &= (~FCIE_CONFIG) ;	//commaon setting with FCIE_GPIO
     XBYTE[REG_MUX_FUNC_SEL3]|=FLHWE_IS_GPIO;
     XBYTE[REG_GPIO_OE_1] &=(~BIT7);    //gpio15 is output

}
//---------------------------------------------------------------------
void EnableLVDS_HS_VS_VE_DE_IsGpio( void )   // HS,VS,Clk,Ve is gpio
{
//    XBYTE[ODD_IS_GPIO_0]  |= 0x0c;
//    XBYTE[ODD_GPO_SEL_0]  |= 0x0c; //only hsync/vsync
//    XBYTE[ODD_GPO_OEZ_0]  =( XBYTE[ODD_GPO_OEZ_0] & 0xf0) | 0x0c;  //input pin

    XBYTE[ODD_IS_GPIO_0]  |= 0x03;
    XBYTE[ODD_GPO_SEL_0]  |= 0x03; //only hsync/vsync
    XBYTE[ODD_GPO_OEZ_0]  =( XBYTE[ODD_GPO_OEZ_0] & 0xf0) | 0x0c;  //input pin

}
//-----------------------------------------------------------------------
void InitialLVDS_B0_B1_IsGpio ( void ) //MUTES/PW_SAVE
{
    XBYTE[REG_SEL_TTL_1]  |= 0x08;  //bit 3 =0;
    XBYTE[ODD_IS_GPIO_3]  |= 0x0c;  //PAD_b_ODD0/PAD_b_ODD1 is GPIO
    XBYTE[ODD_GPO_SEL_3]  |= 0x0c;  //

    //define B0/b1 gpio is output port
    XBYTE[ODD_GPO_OEZ_3] = (XBYTE[ODD_GPO_OEZ_3] & 0xf3);
}
//---------------------------------------------------------------------
void Intial2338_TS_Port(void)
{
   XBYTE[REG_MUX_CONFIG_0] |= TS0_IS_TS0;

   XBYTE[REG_MUX_CONFIG_0] &= ~( TS0_IS_DI );
   XBYTE[REG_MUX_FUNC_SEL3]&= ~( TS0_IS_GPIO );
   XBYTE[REG_MUX_FUNC_SEL6]&= ~( DHC_DFT_MODE);
   XBYTE[REG_MUX_CONFIG_5] &= ~( DSPE_JTAG_MODE );
}
//---------------------------------------------------------------------
void InitialSaturn2_PCI_Port ( void )
{
  // XBYTE[REG_MUX_FUNC_SEL0] &= (~ATCON_SETTING);
    XBYTE[REG_MUX_FUNC_SEL0] &= (~ATCON_SETTING);
    XBYTE[REG_MUX_CONFIG_4] =(XBYTE[REG_MUX_CONFIG_4] & (~FCIE_CONFIG) );
}
//---------------------------------------------------------------------
void InitialSarGpio( void )
{
		XBYTE[REG_SAR_CTRL20] &= 0x33;  //sar2/sar3 is gpio and output pin
        SC_CVS(_HIGH);
		LINE_RL_S(_LOW);
}
//---------------------------------------------------------------------
//---------------------------------------------------------------------
void Mst_GPIO_Initial( void )
{
	//gpio port
	Initial2338_IR_Port();
	Initial2338_UART1_Port();
	Initial2338_Pin134_to_GPIO15();

    //mod lvds gpio
    EnableLVDS_HS_VS_VE_DE_IsGpio();
    InitialLVDS_B0_B1_IsGpio();

	//initial SAR as gpio
	InitialSarGpio();
	//TS0 port
	Intial2338_TS_Port();

    //PCI port
	InitialSaturn2_PCI_Port();
}
//---------------------------------------------------------------------
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