mst037l_d01_gpio.c

mstar 776 开发的车载dvd

#include "mreg51.h"
#include "sysinfo.h"
#include "hwreg.h"
#include "drvuart.h"
#include "drvmiu.h"
#include "drvsys.h"
#include "Analog_Reg.h"
#include "drvGlobal.h"
#include "drvISR.h"
#include "drviic.h"

#include <stdio.h>

#include "DrvGpio.h"

//---------------------------------------------------------------------
#define DI_PORT_SEL                  NO_DI_PORT
#define DI_PORT_IO_SET               NULL

#define TS_PORT_SEL                  TS_PORT_IS_TS

#define PCI_PORT_SEL                PCI_PORT_IS_GPIO
#define PCI_GPIO_ENABLE             (PCI_GPIO_0)
#define PCI_GPIO_SETTING            (BIT2|BIT1|BIT0)        //define input only


#define IR_PORT_SEL                 IR_USE_PAD_IRIN

#define HS_VS_VD_DE_IO_SETTING      0x00    //all output
#define SET_B0_B1_IO_MODE           0x00    //BIT3,BIT2=00b
#define SET_G4_G5_IO_MODE           (BIT7|BIT6)  //set to input mode
#define SET_R6_R7_IO_MODE			(BIT5|BIT4)  //all default set to input



//---------------------------------------------------------------------
void EnableLVDS_HS_VS_VE_DE_IsGpio( void )   // HS,VS,Clk,Ve is gpio
{
    XBYTE[ODD_IS_GPIO_0]  |= 0x0c;
    XBYTE[ODD_GPO_SEL_0]  |= 0x0c; //only de/clk
    XBYTE[ODD_GPO_OEZ_0]  =( XBYTE[ODD_GPO_OEZ_0] & 0xf0) | 0x0c;  //input pin

}
//---------------------------------------------------------------------
void EnableLVDS_R6_R7_IsGpio(void)
{
    XBYTE[REG_SEL_TTL_0 ] |= 0x10;      //bit 4 =0;
    XBYTE[ODD_IS_GPIO_0]  |= 0x30;      //PAD_g_ODD4/PAD_g_ODD5 is GPIO
    XBYTE[ODD_GPO_SEL_0]  |= 0x30;      //
    XBYTE[ODD_GPO_OEZ_0] = (XBYTE[ODD_GPO_OEZ_0] & 0xcf)| SET_R6_R7_IO_MODE;
}

//---------------------------------------------------------------------
void InitialSaturn2_UART1_Port(void )	  //as UART1
{
		XBYTE[REG_MUX_CONFIG_3] &= ~(SECOND_UART_MODE); //UART1 not enable
	    XBYTE[REG_MUX_CONFIG_3] &= ~(I2S_MUTE_MODE);    //not I2S_mute_mode
        XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);  //XBYTE[0x1ea1] &=0xe7;   //disable CEC
        XBYTE[REG_P1_ENABLE] &= (~BIT7 );         //XBYTE[0x1ea4] &=0x7f;   //disable P1_7

        //pin 1,2,3
        XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);        //XBYTE[0x1ea1] &=0xe7;   //disable CEC
        XBYTE[REG_P1_ENABLE] &=~(BIT2|BIT1|BIT0);
        XBYTE[REG_MUX_FUNC_SEL0] &=0xf3;            //atcon_setting=00b
        XBYTE[REG_GPIO_OE_0]=(BIT0|BIT1|BIT2);      //default set to input
}
//---------------------------------------------------------------------
void    Initial_FcieToGpio( void )
{
    XBYTE[REG_MUX_CONFIG_3] &= ~(PCM2CONFIG);
    XBYTE[REG_MUX_FUNC_SEL2] = (XBYTE[REG_MUX_FUNC_SEL2] & 0xcf)| BIT4;  //fcie 0/1 is gpio
    XBYTE[REG_MUX_FUNC_SEL3] |=  BIT7;  //fcie 2~9 is gpio
	//fcie_config is setting in "InitialSaturn2_Pin134"
}

//---------------------------------------------------------------------
//In MST demo set(2338)
//INT/IR is gpio, remote_control IR connect to IR2
//---------------------------------------------------------------------
void InitialSaturn2_IR_Port( void )
{
    XBYTE[REG_MUX_CONFIG_2] |= IR_PORT_SEL;
}

void InitialSaturn2_Pin134 (void )	  //pin 134 cec/flhwe
{
     XBYTE[REG_MUX_FUNC_SEL1] &= (~CEC_MODE);
     XBYTE[REG_MUX_CONFIG_4]  &= (~FCIE_CONFIG) ;	//commaon setting with FCIE_GPIO
     XBYTE[REG_MUX_FUNC_SEL3]|=FLHWE_IS_GPIO;
     XBYTE[REG_GPIO_OE_1] &=(~BIT7);    //gpio15 is output

}
//---------------------------------------------------------------------
//---------------------------------------------------------------------
//---------------------------------------------------------------------
void IntialSaturn2_TS_Port(void)	 //TS0 interface
{
   XBYTE[REG_MUX_CONFIG_0] |= TS0_IS_TS0;

   XBYTE[REG_MUX_CONFIG_0] &= ~( TS0_IS_DI );
   XBYTE[REG_MUX_FUNC_SEL3]&= ~( TS0_IS_GPIO );
   XBYTE[REG_MUX_FUNC_SEL6]&= ~( DHC_DFT_MODE);
   XBYTE[REG_MUX_CONFIG_5] &= ~( DSPE_JTAG_MODE );
}
//---------------------------------------------------------------------
//---------------------------------------------------------------------
void InitialSaturn2_I2S_Port( void )
{
    XBYTE[REG_MUX_FUNC_SEL3]&=( ~I2S_IS_GPIO );
    XBYTE[REG_MUX_CONFIG_3] = ( XBYTE[REG_MUX_CONFIG_3] & 0x3f ) | I2S_MUTE_MODE_1;    //I2sMUTE pin
}
//---------------------------------------------------------------------
void InitialSaturn2_PCI_Port(void)		//PCI is GPIO
{
    XBYTE[REG_MUX_FUNC_SEL0] &= (~ATCON_SETTING);

    XBYTE[REG_MUX_PCI]=(XBYTE[REG_MUX_PCI] & 0xc0) | PCI_GPIO_ENABLE; // PCI_AD0~AD7 is GPIO
    XBYTE[REG_MUX_CONFIG_2] &= (~PCI_CONFIG);
    XBYTE[REG_PCI_GPIO_OE_0]=PCI_GPIO_SETTING;
}
//---------------------------------------------------------------------
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//---------------------------------------------------------------------
void Mst_GPIO_Initial( void )
{
	//gpio port
	IntialSaturn2_TS_Port();
	InitialSaturn2_Pin134();
 	InitialSaturn2_IR_Port();
	InitialSaturn2_UART1_Port();
	Initial_FcieToGpio();


	//mod lvds gpio
    EnableLVDS_R6_R7_IsGpio();
    EnableLVDS_HS_VS_VE_DE_IsGpio();

	//TS0 port
	IntialSaturn2_TS_Port();

    //PCI port as GPIO
	InitialSaturn2_PCI_Port();

	//i2s interface
	InitialSaturn2_I2S_Port();

}
//---------------------------------------------------------------------