drvserflash.c

mstar 776 开发的车载dvd

}


//------------------------------------------------------------------------------
/// Read data from Serial Flash
/// @param  u32Addr \b IN: start address
/// @param  pu8Data \b OUT: data ptr to store the read data
/// @param  u32Size \b IN: size in Bytes
/// @return TRUE : succeed
/// @return FALSE : fail before timeout or illegal parameters
//------------------------------------------------------------------------------
BOOLEAN MDrv_Flash_Read(U32 u32Addr, U32 u32Size , U8 *pu8Data)
{
    BOOLEAN bRet = FALSE;
    U32 u32I;

    ENABLE_ISP();

    SFSH_RIU_REG16(REG_SFSH_ADDRESS21, LOU16(u32Addr));
    SFSH_RIU_REG16(REG_SFSH_ADDRESS3, HIU16(u32Addr));

    if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
    {
        goto MDrv_SerFlash_Read_return;
    }

    // 0x0003 normal read
    // 0x000b fast read
    SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x000b);

    for ( u32I = 0; u32I < u32Size; u32I++ )
    {
        SFSH_RIU_REG16(REG_SFSH_SPI_RD_REQ, 0x01);      // SPI read request

        if ( _MDrv_SerFlash_WaitReadDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_Read_return;
        }

        pu8Data[u32I] = SFSH_RIU_Read8(REG_SFSH_RDATA);
    }

    bRet = TRUE;

MDrv_SerFlash_Read_return:

    SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR, 1);             // SPI CEB dis

    DISABLE_ISP();
    //MDrv_Timer_Delayms(1);  // seven 20070808 for SPI

    return bRet;
}

//------------------------------------------------------------------------------
/// Protect blocks in Serial Flash
/// @param  bEnable \b IN: TRUE/FALSE: enable/disable protection
/// @return TRUE : succeed
/// @return FALSE : fail before timeout
//------------------------------------------------------------------------------
BOOLEAN MDrv_Flash_WriteProtect(BOOLEAN bEnable)
{
    BOOLEAN bRet = FALSE;

    ENABLE_ISP();

    if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
    {
        goto MDrv_SerFlash_WriteProtect_return;
    }

    SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x8006 ); //WREN

    if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
    {
        goto MDrv_SerFlash_WriteProtect_return;
    }

    SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x8001 ); //WRSR

    if (bEnable)
    {
        //SFSH_RIU_REG16(REG_SFSH_WDATA, (0x8000 | (0x7<<2) ));  //[4:2] protect blocks
        SFSH_RIU_REG16(REG_SFSH_WDATA, (0x8000 | ((0xF<<2)|0x80) ));  //[5:2] protect blocks
        // printf("WP enable....\r\n");
    }
    else
    {
        //SFSH_RIU_REG16(REG_SFSH_WDATA, (0x8000 | (0x0<<2)) );  //[4:2] protect blocks
        //SFSH_RIU_REG16(REG_SFSH_WDATA, (0x8000 | (0xD<<2)) );  //[5:2] protect blocks
        SFSH_RIU_REG16(REG_SFSH_WDATA, (0x8000 | (0xC<<2)) );  //[5:2] protect blocks
        //printf("WP disable....\r\n");
        //_MDrv_SerFlash_WaitWriteDone();
    }

    bRet = _MDrv_SerFlash_WaitWriteDone();

//==[Start]====Special Command for AT26DF161==================
#if 0  //Enable this segment only if using AT26DF161 !!!
    if (bEnable == FALSE)
    {
        SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR, 1 ); //SPI CEB dis

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x8006); //WREN
        SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x0006); //WREN

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_TRIGGER_MODE , 0x3333); //enable trigger mode

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | 0x39)); //Unprotect Sector

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (HIU16(SYSTEM_BANK_DATABASE*SERFLASH_BLOCK_SIZE) & 0xFF) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (LOU16(SYSTEM_BANK_DATABASE*SERFLASH_BLOCK_SIZE) >>8 ) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16( REG_SFSH_WDATA , ( 0x8000 | (LOU16(SYSTEM_BANK_DATABASE*SERFLASH_BLOCK_SIZE) & 0xFF) ) );

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16( REG_SFSH_TRIGGER_MODE,  0x2222 );   // disable trigger mode

        SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR , 1 );      // SPI CEB dis

        bRet = _MDrv_SerFlash_WaitWriteDone();

        SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR, 1 ); //SPI CEB dis

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x8006); //WREN
        SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x0006); //WREN

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_TRIGGER_MODE , 0x3333); //enable trigger mode

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | 0x39)); //Unprotect Sector

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (HIU16(QUICK_DB_GENSETTING_BANK*SERFLASH_BLOCK_SIZE) & 0xFF) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (LOU16(QUICK_DB_GENSETTING_BANK*SERFLASH_BLOCK_SIZE) >>8 ) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16( REG_SFSH_WDATA , ( 0x8000 | (LOU16(QUICK_DB_GENSETTING_BANK*SERFLASH_BLOCK_SIZE) & 0xFF) ) );

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_WriteProtect_return;
        }

        SFSH_RIU_REG16( REG_SFSH_TRIGGER_MODE,  0x2222 );   // disable trigger mode

        SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR , 1 );      // SPI CEB dis

        bRet = _MDrv_SerFlash_WaitWriteDone();
    }
#endif  //Enable this segment only if using AT26DF161 !!!
//==[End]======Special Command for AT26DF161==================

MDrv_SerFlash_WriteProtect_return:

    SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR,  1 ); //SPI CEB dis

    DISABLE_ISP();
    //MDrv_Timer_Delayms(1);  // seven 20070808 for SPI

    SPI_INFO(printf("MDrv_SerFlash_WriteProtect %02bx\n", bRet));

    return bRet;
}

//------------------------------------------------------------------------------
/// Read ID from Serial Flash
/// @param  pu8Data \b OUT: data ptr to store the read ID
/// @param  u32Size \b IN: size in Bytes
/// @return TRUE : succeed
/// @return FALSE : fail before timeout
//------------------------------------------------------------------------------
BOOLEAN MDrv_SerFlash_ReadID(U8 *pu8Data, U8 u32Size)
{
    BOOLEAN bRet = FALSE;
    U8 u32I;

    ENABLE_ISP();

    if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
    {
        goto MDrv_SerFlash_ReadID_return;
    }

    SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x80AB); //RDID

    for ( u32I=0; u32I<u32Size; u32I++)
    {
        SFSH_RIU_REG16(REG_SFSH_SPI_RD_REQ , 0x01); //SPI read request

        if ( _MDrv_SerFlash_WaitReadDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_ReadID_return;
        }

        pu8Data[u32I] = SFSH_RIU_Read8(REG_SFSH_RDATA);
    }

    bRet = TRUE;

MDrv_SerFlash_ReadID_return:

    SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR, 1); //SPI CEB dis

    DISABLE_ISP();
    //MDrv_Timer_Delayms(1);  // seven 20070808 for SPI

    SPI_INFO(printf("MDrv_SerFlash_ReadID %x\n", bRet));

    return bRet;

}

//------------------------------------------------------------------------------
/// Erase certain sectors in Serial Flash
/// @param  u32StartSec    \b IN: start sector
/// @param  u32EndSec      \b IN: end sector
/// @return TRUE : succeed
/// @return FALSE : fail before timeout or illegal parameters
//------------------------------------------------------------------------------
BOOLEAN MDrv_Flash_Erase(U16 u32StartSec, U16 u32EndSec, U8 u8Wait)
{
    //HW doesn't support Sector Erase command now; use trigger mode instead.
    BOOLEAN bRet = FALSE;
    U32 u32I;

//    if ( u32StartSec>u32EndSec || u32EndSec>=NUMBER_OF_SERFLASH_SECTORS )
    if ( u32StartSec>u32EndSec || u32EndSec>=NUMBER_OF_SERFLASH_BLOCKS )
    {
        return FALSE;
    }

    ENABLE_ISP();

    SPI_INFO(printf( "Erase sector....\r\n" ));

    for ( u32I=u32StartSec; u32I<=u32EndSec; u32I++ )
    {
        SFSH_RIU_REG16(REG_SFSH_SPI_CE_CLR, 1 ); //SPI CEB dis

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x8006); //WREN
        SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND, 0x0006); //WREN

        if ( _MDrv_SerFlash_WaitWriteCmdRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_SPI_COMMAND) = 0x80D7; //SECTOR_ERASE

        SFSH_RIU_REG16(REG_SFSH_TRIGGER_MODE , 0x3333); //enable trigger mode

        //SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | 0xD7)); //SECTOR_ERASE
        //SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | 0x20)); //SECTOR_ERASE
        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | 0xD8)); //SECTOR_ERASE

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (HIU16(u32I*SERFLASH_SECTOR_SIZE) & 0xFF) ));
        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (HIU16(u32I*SERFLASH_BLOCK_SIZE) & 0xFF) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        //SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (LOU16(u32I*SERFLASH_SECTOR_SIZE) >>8 ) ));
        SFSH_RIU_REG16(REG_SFSH_WDATA , (0x8000 | (LOU16(u32I*SERFLASH_BLOCK_SIZE) >>8 ) ));

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        //SFSH_RIU_REG16( REG_SFSH_WDATA , ( 0x8000 | (LOU16(u32I*SERFLASH_SECTOR_SIZE) & 0xFF) ) );
        SFSH_RIU_REG16( REG_SFSH_WDATA , ( 0x8000 | (LOU16(u32I*SERFLASH_BLOCK_SIZE) & 0xFF) ) );

        if ( _MDrv_SerFlash_WaitWriteDataRdy() == FALSE )
        {
            goto MDrv_SerFlash_EraseSec_return;
        }

        SFSH_RIU_REG16( REG_SFSH_TRIGGER_MODE,  0x2222 );   // disable trigger mode

        SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR , 1 );      // SPI CEB dis

        if ( u8Wait== TRUE)
        {
            bRet = _MDrv_SerFlash_WaitWriteDone();
        }
        else
        {
            bRet = TRUE;
        }
    }

MDrv_SerFlash_EraseSec_return:

    SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR ,1 );           // SPI CEB dis

    DISABLE_ISP();
    //MDrv_Timer_Delayms(1);  // seven 20070808 for SPI

    SPI_INFO(printf("MDrv_SerFlash_EraseSec %02bx\n", bRet));

    return bRet;
}

//------------------------------------------------------------------------------
/// Check Write Done in Serial Flash
/// @return TRUE : Done
/// @return FALSE : Not Done Yet
//------------------------------------------------------------------------------
BOOLEAN MDrv_Flash_CheckWriteDone(void)
{
    BOOLEAN bRet = FALSE;

    ENABLE_ISP();

    SPI_INFO(printf( "Check Write Done....\r\n" ));

    SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR , 1 );      // SPI CEB dis

    bRet = _MDrv_SerFlash_CheckWriteDone();

    SFSH_RIU_REG16( REG_SFSH_SPI_CE_CLR ,1 );           // SPI CEB dis

    DISABLE_ISP();
    //MDrv_Timer_Delayms(1);  // seven 20070808 for SPI

    SPI_INFO(printf("MDrv_Flash_CheckWriteDone %02bx\n", bRet));

    return bRet;
}

#if 1// kevin 071224 //(!BOOTLOADER_SYSTEM)
// TODO: flash

/******************************************************************************/
/// Read Factory Test Setting from flash
/******************************************************************************/
U8 MDrv_Flash_GetFactoryTestSetting( void )
{
#if 1 // TODO: flash
    return 0;
#else
    XBYTE[MCU_SSP_WD0] = CMD_READ;

    ///- Write flash address
    XBYTE[MCU_SSP_WD1] = (SYSTEM_BANK_DATADASE_BASE & 0x00FF0000) >> 16;    // MSB
    XBYTE[MCU_SSP_WD2] = (SYSTEM_BANK_DATADASE_BASE & 0x0000FF00) >>  8;
    XBYTE[MCU_SSP_WD3] = (SYSTEM_BANK_DATADASE_BASE & 0x000000FF);

    XBYTE[MCU_SSP_TRIG] = (0x80 | (BUSY_BIT << 3) | (1 + 3));
    return ( XBYTE[0xC04C] );
#endif
}
#endif