drvvop.c

mstar 776 开发的车载dvd

////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
/// @file drvvop.h
/// @brief Video Output Processor (VOP)
/// @author MStarSemi Inc.
///
/// Display controller(DC) unit (also called Video Output Processor(VOP)).
/// DC read DRAM MVD decode data and send it to back-end processor.
/// The frame rate could be programmed by registers.
/// The sync. generator(SG) generates the SYNC signal like HSYNC, VSYNC, FIELD.
/// It also generate the standard CCIR656 data.
///
/// Features
///  - Output mode : interlace or progressive
///  - Maximum Display resolution 1920x1080
///  - Support MVD interlace or progressive YUV420 image
///  - one read channel to MIU ,  each request always work with 16 words( 8Y8UV)
///  - high MIU read priority when UV buffer data depth under 32 or 16.
///  - CCIR656 support
///  - Horizontal, Vertical duplicate support.
///  - MVD Image size resize mode
/// @image html vop.jpg
///
///////////////////////////////////////////////////////////////////////////////


/******************************************************************************/
/*                    Header Files                        */
/* ****************************************************************************/
#include <string.h>
#include <stdio.h>
#include "datatype.h"
#include "Board.h"

#include "Analog_Reg.h"
#include "hwreg.h"
#include "sysinfo.h"
#include "drvGlobal.h"
#include "drvvop.h"

#define     REG_UPDATE_DC0_SYNC_CW     (0x0022 + (CHIP_REG_BASE))
#define     REG_CKG_DC0                (0x002A + (CHIP_REG_BASE))
#define     REG_DC0_NUM                (0X0040 + (CHIP_REG_BASE))
#define     REG_DC0_DEN                (0X0042 + (CHIP_REG_BASE))
#define     REG_DC0_FREERUN_CW_L       (0X0054 + (CHIP_REG_BASE))
#define     REG_DC0_FREERUN_CW_H       (0X0056 + (CHIP_REG_BASE))


//#define DBG_VOP
#define FPGA_MODE   // (800x600p vop output timing & csc enable)

/********************************************************************************/
/*                     Local                    */
/* ******************************************************************************/

typedef struct _MDrv_VOP_Setting
{
    U16 addr;
    U8  val;
} MDrv_VOP_Setting;

/********************************************************************************/
/*                   Local Function Prototypes                     */
/********************************************************************************/

/********************************************************************************/
/*                   Functions                      */
/********************************************************************************/


/******************************************************************************/
/// Initialize VOP hardware and set it to hardwire mode
/******************************************************************************/
void MDrv_VOP_Init ()
{
    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Init()]\r\n" );
    #endif
  #ifdef   DDRAM_16Mx16
    //for bandwiidth issue  ___START___
    XBYTE[VOP_TST_IMG] = 0x40;
    //for bandwiidth issue  ___END___
  #endif
    MDrv_VOP_Input_Mode( VOPINPUT_HARDWIRE, NULL );
}

void MDrv_VOP_SetBlackBG ( void )
{
    U8 regval;
    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_SetBlackBG()]\r\n" );
    #endif

    regval = XBYTE[VOP_TST_IMG];
    XBYTE[VOP_TST_IMG] = 0x02;
    XBYTE[VOP_TST_IMG] = 0x00;
    XBYTE[VOP_TST_IMG] = regval;
}

//-------------------------------------------------------------------------------------------------
// Calculate MaxFactor.
// @return MaxFactor
//-------------------------------------------------------------------------------------------------
static U32 _MaxFactor ( U32 u32Num1, U32 u32Num2)
{
    int remainder, quotient;

    while (1)
    {
        if (u32Num1 > u32Num2)
        {
            if ((u32Num1%u32Num2) == 0)
                return u32Num2;
            else
            {
                quotient = u32Num1/u32Num2;
                remainder = u32Num1- (u32Num2*quotient);

                u32Num1= u32Num2;
                u32Num2= remainder;

            }
        }
        else
        {
            if ((u32Num2%u32Num1) == 0)
                return u32Num1;
            else
            {
                quotient = u32Num2/u32Num1;
                remainder = u32Num2 - (u32Num1*quotient);

                u32Num2 = u32Num1;
                u32Num1 = remainder;
            }
        }
    }
}

#define MIN_VOP_FREQ    16000000ul

/******************************************************************************/
/// Enable and Disable VOP
/// @param bEnable \b IN
///   - # TRUE  Enable
///   - # FALSE Disable and reset
/******************************************************************************/
void MDrv_VOP_Enable ( BOOLEAN bEnable )
{
    U8 regval;

    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Enable()]\r\n" );
    #endif

    regval = XBYTE[VOP_CTRL0];

    if ( bEnable )
    {
        regval |= 0x1;
    }
    else
    {
        regval &= ~0x1;
    }

    XBYTE[VOP_CTRL0] = regval;
}


/******************************************************************************/
/// Set VOP interrupt mask
/// @param type \b IN \copydoc VOPINTRTYPE
/// @param bEnable \b IN
///   - # TRUE  Enable interrupts specified in type
///   - # FALSE Disable interrupts specified in type
/******************************************************************************/
void MDrv_VOP_Intr_Enable ( VOPINTRTYPE type, BOOLEAN bEnable )
{
    U8 regval;

    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Intr_Enable()]\r\n" );
    #endif

    regval = XBYTE[VOP_INT_MASK];

    if ( bEnable )
    {
        regval &= ~type;
    }
    else
    {
        regval |= type;
    }

    XBYTE[VOP_INT_MASK] = regval;
}

/******************************************************************************/
/// Clear interrupt
/// @param type \b IN interrupts to be cleared
/******************************************************************************/
void MDrv_VOP_Intr_Clear ( VOPINTRTYPE type )
{
    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Intr_Clear()]\r\n" );
    #endif

    XBYTE[VOP_INT_MASK] |= type;

}

/******************************************************************************/
/// Get interrupt status
/// @return Interrupts asserted
/******************************************************************************/
VOPINTRTYPE MDrv_VOP_Intr_GetStatus ()
{
    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Intr_GetStatus()]\r\n" );
    #endif

    return XBYTE[VOP_INT_MASK + 1];
}

/******************************************************************************/
/// Set VOP input mode
/// @param mode \b IN \copydoc VOPINPUTMODE
/// @param pparam \b IN \copydoc VOPINPUTPARAM members should be set for
///   - #VOPINPUT_HARDWIRE     N/A
///   - #VOPINPUT_HARDWIRECLIP HSize and VSize
///   - #VOPINPUT_MCUCTRL      Y Offset, UV offset, HSize adn VSize
/******************************************************************************/
void MDrv_VOP_Input_Mode ( VOPINPUTMODE mode, VOPINPUTPARAM *pparam )
{
    LONG32_BYTE u32tmp;
    U8 regval;
    U16 u16strip;

    #ifdef DBG_VOP
    printf ( "[Drvvop.c::MDrv_VOP_Input_Mode()]\r\n" );
    #endif

    //set VOP test pattern to black
    MDrv_VOP_EnableBlackBG();

    //regval = XBYTE[VOP_MPG_JPG_SWITCH];
    regval = 0;
    regval |= ( mode & 0x3 );

    if ( mode == VOPINPUT_HARDWIRE )
    {
        XBYTE[VOP_MPG_JPG_SWITCH] = regval;
    }
    else if ( mode == VOPINPUT_HARDWIRECLIP )
    {
        XBYTE[VOP_MPG_JPG_SWITCH] = regval;

        // HSize, VSize
        XBYTE[VOP_JPG_HSIZE    ] = LOWBYTE( pparam->u16HSize );
        XBYTE[VOP_JPG_HSIZE + 1] = HIGHBYTE( pparam->u16HSize );
        XBYTE[VOP_JPG_VSIZE    ] = LOWBYTE( pparam->u16VSize );
        XBYTE[VOP_JPG_VSIZE + 1] = HIGHBYTE( pparam->u16VSize );
    }
    else if ( mode == VOPINPUT_MCUCTRL )
    {
        if ( pparam->bProgressive )
            regval |= 0x4;
        else
            regval &= ~0x4;

        if ( pparam->bYUV422 )
            regval |= 0x10;
        else
            regval &= ~0x10;

        if ( pparam->b422pack )
            regval |= 0x80;

        if ( pparam->bDramRdContd == 1 )
            regval |= 0x20;
        else
            regval &= ~0x20;

        // for backward compatable to saturn
        // [3] UV-7bit mode don't care
        // [5] dram_rd_md =0
        // [6] Fld don't care
        // [7] 422pack don'care
        XBYTE[VOP_MPG_JPG_SWITCH] = regval;

        if (pparam->u16StripSize == 0)
        {
        if (pparam->bSD)
            u16strip = 720;
        else
            u16strip = 1920;
        }
        else
        {