drvscaler_nr.c

mstar 776 开发的车载dvd

        }
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetDNR(MS_DNR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);

    switch (eCtrl)
    {
    case MS_DNR_ON:
        MDrv_WriteRegBit(BK_SC_DNR_1C_H, DISABLE, _BIT2);  // DNR_En_F2
        MDrv_WriteByteMask(BK_SC_DNR_1B_L, 0x8F, 0x8F);
        break;

    case MS_DNR_FORCE_PRE: // Y/C Ratio force 100% previous
        MDrv_WriteRegBit(BK_SC_DNR_1C_H, DISABLE, _BIT2);  // DNR_En_F2
        MDrv_WriteByteMask(BK_SC_DNR_1B_L, 0x30, 0x30);
        break;

    case MS_DNR_OFF:
    default:
        MDrv_WriteRegBit(BK_SC_DNR_1C_H, DISABLE, _BIT2);  // DNR off
        break;
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetCNR(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);

    if (eCtrl == MS_NR_OFF)
    {
        MDrv_WriteRegBit(BK_SC_DNR_1B_H, DISABLE, _BIT0); // Pre_CCS_Flt_F2
        MDrv_WriteRegBit(BK_SC_DNR_1B_H, DISABLE, _BIT1); // Pre_CCS_En_F2
    }
    else
    {
        //MDrv_WriteRegBit(BK_SC_DNR_1B_H, ENABLE, _BIT0); // Pre_CCS_Flt_F2
        //MDrv_WriteRegBit(BK_SC_DNR_1B_H, ENABLE, _BIT1); // Pre_CCS_En_F2
        MDrv_WriteRegBit(BK_SC_DNR_6E_H, ENABLE, _BIT6); // patch HW bug
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_Set_DNRHmd(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);

    if (eCtrl == MS_NR_OFF)
    {
        MDrv_WriteRegBit(BK_SC_DNR_1B_H, DISABLE, _BIT4);   // Pre_HmD_En_F2
    }
    else
    {
        //MDrv_WriteRegBit(BK_SC_DNR_1B_H, ENABLE, _BIT3); // Pre_HmD_Flt
        MDrv_WriteRegBit(BK_SC_DNR_1B_H, ENABLE, _BIT4); // Pre_HmD_En
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetPNR(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_OPM);

    if (eCtrl == MS_NR_OFF)
    {
        MDrv_WriteRegBit(BK_SC_OPM_3B_L, ENABLE, _BIT2); // pnr_force_disable_f2
    }
    else
    {
        MDrv_WriteRegBit(BK_SC_OPM_3B_L, DISABLE, _BIT2);
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetPCNR(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_OPM);

    if (eCtrl == MS_NR_OFF)
    {
        MDrv_WriteByteMask(BK_SC_OPM_35_L, 0x00, 0x03); // disable POS_CCS_FLT and POS_CCS_EN
    }
    else
    {
        MDrv_WriteByteMask(BK_SC_OPM_54_L, 0x00, 0xF0); // YIIR_Mode, UV_IIR_Mode
        MDrv_WriteByteMask(BK_SC_OPM_35_L, 0x03, 0x03); // POS_CCS_EN & POS_CCS_FLT
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDr_Scaler_SetPNRHmD(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_OPM);

    if (eCtrl == MS_NR_OFF)
    {
        MDrv_WriteByteMask(BK_SC_OPM_38_L, 0x00, 0x03); // disable POST_HMD_EN and POST_HMD_FLT
    }
    else
    {
        MDrv_WriteByteMask(BK_SC_OPM_62_L, 0x00, 0x0F);// UV_iir_mode_hmd & Y_iir_mode_hmd
        MDrv_WriteByteMask(BK_SC_OPM_38_L, 0x01, 0x03); // pos_hmd_flt_f2
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetSNR(MS_NR_FUNCTION_TYPE eCtrl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_ACE);

    if (IsSrcTypeAV(stSystemInfo.enInputSourceType))
    {
        if (eCtrl == MS_NR_ON)
        {
            MDrv_Write2Byte(BK_SC_ACE_30_L, 0x0001);
            MDrv_Write2Byte(BK_SC_ACE_31_L, 0x0010);
            MDrv_Write2Byte(BK_SC_ACE_34_L, 0xFFFF);
            MDrv_Write2Byte(BK_SC_ACE_35_L, 0x469C);
            MDrv_Write2Byte(BK_SC_ACE_36_L, 0x0012);
            MDrv_Write2Byte(BK_SC_ACE_37_L, 0x0000);
        }
        else
        {
            MDrv_Write2Byte(BK_SC_ACE_30_L, 0x0000);
        }
    }

    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

static void MDrv_Scaler_SetPreNR8Bits(BOOLEAN bCtl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);
    MDrv_WriteRegBit(BK_SC_DNR_11_H, bCtl, _BIT7);
    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_SetForceNR10_8Bits(MS_NR_BIT_TYPE eCtl)
{
    U8 u8Bank;

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);

    switch (eCtl)
    {
        case MS_NR_FORCE_8BITS:
            MDrv_WriteRegBit(BK_SC_DNR_1C_H, DISABLE, _BIT7);
            MDrv_WriteRegBit(BK_SC_DNR_11_H, ENABLE, _BIT7);
            break;

        case MS_NR_FORCE_10BITS:
            MDrv_WriteRegBit(BK_SC_DNR_1C_H, ENABLE, _BIT7);
            MDrv_WriteRegBit(BK_SC_DNR_11_H, DISABLE, _BIT7);
            break;

        default:
        case MS_NR_FORCE_OFF:
            MDrv_WriteRegBit(BK_SC_DNR_1C_H, DISABLE, _BIT7);
            MDrv_WriteRegBit(BK_SC_DNR_11_H, DISABLE, _BIT7);
            break;
    }

    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

//-----------------------------------------------------------------------------
// Public APIs of NR
//-----------------------------------------------------------------------------

void MDrv_Scaler_InitNR(void)
{
    // Init DNR
    MDrv_WriteRegTbl2(DNR_YC_IIR_TBL);  // DNR Cur/Pre Y C Table
    MDrv_Write2Byte(BK_SC_DNR_20_L, 0x4444);

    // Init DNR's CNR
    MDrv_WriteRegTbl2(DNR_CNR_TBL);
    MDrv_WriteRegTbl2(DNR_CNR_WT_TBL);

    // Init DNR's HmD
    MDrv_WriteRegTbl2(DNR_HMD_TBL);
    MDrv_WriteRegTbl2(DNR_HMD_WT_TBL);

    // Init PNR
    MDrv_WriteRegTbl2(PNR_YC_TBL);

    // Init PNR's CNR
    MDrv_WriteRegTbl2(PNR_PCNR_TBL);
    MDrv_WriteRegTbl2(PNR_PCNR_WT_TBL);

    // Init PNR's HmD
    MDrv_WriteRegTbl2(PNR_HMD_TBL);
    MDrv_WriteRegTbl2(PNR_HMD_WT_TBL);
}

void MDrv_Scaler_Enable3DNR(BOOLEAN bEnable)
{
    U8 u8Bank;

    // force NR to be disabled when GWIN is consuming bandwidth in HD modes

    // if NR is enabled in progressive mode, enable Force Pre_NR8
    // (don't enable if NR disabled, because it will read data and consume bandwidth)
    MDrv_Scaler_SetPreNR8Bits(bEnable && !(g_DisplayWindowSetting.u8DisplayStatus & DISPLAYWINDOW_INTERLACE));

    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_DNR);

    MDrv_WriteRegBit(BK_SC_DNR_1C_H, bEnable, _BIT4);

    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_EnableNR(MS_3D_NR_FUNCTION_TYPE e3DNRCtl)
{
    MDrv_Scaler_Set3DNR(e3DNRCtl);

    if (/*(e3DNRCtl != MS_3D_NR_OFF )&& // NR On    // kevin */
        (g_SrcInfo.u8DeInterlaceMode == MS_DEINT_2DDI_BOB) // bob mode
        )
    {
        MDrv_Scaler_SetForceNR10_8Bits(MS_NR_FORCE_8BITS);
    }
    else
    {
        MDrv_Scaler_SetForceNR10_8Bits(MS_NR_FORCE_OFF);
    }

    #if ENABLE_PC_CSC
        MDrv_Scaler_SetCNR(MS_NR_ON);
        //MDrv_Scaler_SetSNR(MS_NR_ON);
    #else
    if(IsSrcTypeVga(stSystemInfo.enInputSourceType))
    {
        MDrv_Scaler_SetCNR(MS_NR_OFF);      // for pure RGB
        //MDrv_Scaler_SetSNR(MS_NR_OFF);      // for pure RGB
    }
    else
    {
        MDrv_Scaler_SetCNR(MS_NR_ON);
        //MDrv_Scaler_SetSNR(MS_NR_ON);
    }
    #endif

    if (!(IsSrcColorSpaceYUV()) && (IsSrcTypeVga(stSystemInfo.enInputSourceType)))
    {
        MDrv_Scaler_SetPNR(MS_NR_OFF);
        MDrv_Scaler_SetPCNR(MS_NR_OFF);
        MDrv_Scaler_SetDNR(MS_NR_OFF);
    }
    else
    {
        MDrv_Scaler_SetPNR(MS_NR_ON);
        MDrv_Scaler_SetPCNR(MS_NR_ON);
        MDrv_Scaler_SetDNR(MS_NR_ON);
    }
}