drvscaler_bloader.c

mstar 776 开发的车载dvd

////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
///
///@file drvScaler.h
///@brief Scaler with free-run only for bootloader
///@author MStarSemi Inc.

#define DRV_SCALER_C

/******************************************************************************/
/*                           Header Files                                     */
/* ****************************************************************************/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>

#include "board.h"
#include "sysinfo.h"
#include "drvScaler.h"
#include "panel.h"
//#include "drvglobal.h"
#include "drvtimer.h"
#include "drvmiu.h"
#include "hwreg.h"
#include "drvsys.h"
#include "drvVD.h"
#include "drvScalerTbl.c"
//#include "drvAnalog_inline.h"

#include "msGPIO.h"
#include "drvGPIO.h"

/********************************************************************************/
/*                           Macro                                              */
/********************************************************************************/

/********************************************************************************/
/*                           Constant                                           */
/********************************************************************************/

/********************************************************************************/
/*                           Global Variables                                   */
/* ******************************************************************************/

/********************************************************************************/
/*                           Local Variables                                    */
/********************************************************************************/

/********************************************************************************/
/*               P r i v a t e    F u n c t i o n s                             */
/********************************************************************************/
/* init */
void MDrv_Scaler_InitVariable(void);

/* MOD */
void MDrv_MOD_PowerOn(void);
void MDrv_MOD_PowerOff(void);

/* DAC */
void MDrv_DAC_PowerOn(void);
void MDrv_DAC_PowerOff(void);

/* panel */
void MDrv_Scaler_SetPanelVCC(BOOLEAN bEnable);
void MDrv_Scaler_SetPanelBacklight(BOOLEAN bEnable);

/* mode */
void MDrv_Scaler_SetFreeRunMode(void);

/* LPLL */
void MDrv_Scaler_InitLPLL(void);
void MDrv_Scaler_SetOutputDclk(U16 u16OutputVFreq);

/* ADC */
void MDrv_ADC_PowerOff(void);

//-----------------------------------------------------------------------------
// general
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// init
//-----------------------------------------------------------------------------

void MDrv_Scaler_Init(void)
{
    U8 u8Bank;

    // printf essential info
    printf("\r\n===============================\r\n");
    printf(" [Scaler]\r\n");
    printf(" Frame buf addr: 0x%08lx\n", SCALER_DNR_BUF_ADR);
    printf(" Frame buf size: 0x%08lx\n", SCALER_DNR_BUF_LEN);
    printf("===============================\r\n");

    // Initial varibale
    MDrv_Scaler_InitVariable();

    // SW Rest
    MDrv_Scaler_SoftwareResetEx(RST_SCALER_ALL);

    u8Bank = MDrv_ReadByte(BK_SELECT_00);

    // initiate register
    MDrv_WriteRegTbl2(astScalerRegInit);

    // MOD register initiate: control display data
    MDrv_MOD_PowerOn();

    /* control display clock */
    // LPLL register initiate: control display clock
    MDrv_Scaler_InitLPLL();

    //
    // Display Panel Info
    //
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_VOP);

    // output Sync timing
    MDrv_Write2Byte(BK_SC_VOP_0C_L, devPanel_HTOTAL() - 1);  // output htotal
    MDrv_Write2Byte(BK_SC_VOP_0D_L, devPanel_VTOTAL() - 1);  // output vtotal
    //MsWriteReg(BK_SC_VOP_01_L, g_PanelInfo.u16HSyncWidth - 1);  // hsync width

    // display timing
    // output DE size
    MDrv_Write2Byte(BK_SC_VOP_04_L, devPanel_HSTART());                         // DE H start
    MDrv_Write2Byte(BK_SC_VOP_05_L, devPanel_HSTART() + devPanel_WIDTH() - 1);  // DE H end
    MDrv_Write2Byte(BK_SC_VOP_06_L, 0);                                         // DE V start
    MDrv_Write2Byte(BK_SC_VOP_07_L, 0 + devPanel_HEIGHT() - 1);                 // DE V end

    // main display Window  size
    MDrv_Write2Byte(BK_SC_VOP_08_L, devPanel_HSTART()); //64
    MDrv_Write2Byte(BK_SC_VOP_09_L, devPanel_HSTART() + devPanel_WIDTH() - 1); //863
    MDrv_Write2Byte(BK_SC_VOP_0A_L, devPanel_DE_VSTART()); //0
    MDrv_Write2Byte(BK_SC_VOP_0B_L, devPanel_DE_VSTART() + devPanel_HEIGHT() - 1); //599

    // select clock source
    MDrv_WriteByte(BK_CHIPTOP_1A_H, 0x04); // fclk -> MIU
    MDrv_WriteByte(BK_CHIPTOP_1B_L, 0x00); // fmclk -> MIU
    MDrv_WriteByte(BK_CHIPTOP_1B_H, 0x1C); // odclk -> XTAL
    MDrv_WriteByte(BK_CHIPTOP_1C_H, 0x24); // fice clk -> 54 MHz

    // output control
    MDrv_Write2Byte(BK_SC_VOP_21_L, devPanel_OCTRL());
    MDrv_Write2Byte(BK_SC_VOP_46_L, devPanel_OSTRL());

    // output driving current
    MDrv_WriteByte(BK_SC_VOP_47_L, devPanel_ODRV());

    // dither control
    MDrv_Write2Byte(BK_SC_VOP_1B_L, devPanel_DITHCTRL());

    /* TCON registers are removed from scaler */
    #if 0
    // TCON register initiate
    _MDrv_Scaler_Init_TCON();
    #endif


    // for Bandwidth
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_OPM);
    MDrv_Write2Byte(BK_SC_OPM_51_L, 0x1F1F);
    MDrv_Write2Byte(BK_SC_OPM_52_L, 0x001F);

    MDrv_WriteByte(BK_SELECT_00, REG_BANK_OP1HVSP);
    MDrv_Write2Byte(BK_SC_OP1HVSP_7B_L, 0x0080);    // OP2 Request End Ahead numbers

    // Enable test mode to measure output vsync
    //MDrv_WriteByte(BK_MOD_45_L, 0x38);
    //MDrv_WriteByte(BK_MOD_46_L, 0x38);

    // Not to Enable Scaler Interrupt (bootloader need not it)
    //MDrv_Sys_SetInterrupt( EX1_DISP, ENABLE );

    MDrv_WriteByte(BK_SELECT_00, u8Bank);
}

void MDrv_Scaler_InitVariable(void)
{
    memset (&stSystemInfo, 0, sizeof(stSystemInfo));
}


//-----------------------------------------------------------------------------
// MOD
//-----------------------------------------------------------------------------

void MDrv_MOD_PowerOn(void)
{
    U16 u16MOD_LVDS;
    U16 u16MOD_TTL;
    BOOLEAN bEnable;

    if (devPanel_IsLVDS())
    {
        MDrv_WriteByteMask(BK_MOD_48_L, _BIT4| _BIT3|_BIT2,  _BIT4|_BIT3|_BIT2);
        MDrv_WriteByteMask(BK_MOD_45_L, 0x3F, 0x3F);
        MDrv_Write2Byte(BK_MOD_44_L, MOD_LVDS_GPIO);
        u16MOD_LVDS = (PANEL_CONNECTOR_SWAP_LVDS_CH & _BIT6) | (PANEL_CONNECTOR_SWAP_LVDS_POL & _BIT5) | (PANEL_LVDS_TI_MODE & _BIT2);

        // Dual panel setting
        bEnable = devPanel_Is_DUAL_PORT();
        MDrv_WriteRegBit(BK_MOD_4A_L, bEnable, _BIT1);
        bEnable = devPanel_Is_ChannelSwap();
        MDrv_WriteRegBit(BK_MOD_4A_L, bEnable, _BIT0);

        u16MOD_TTL = 0;
    }
    else // TTL
    {
        MDrv_WriteByteMask(BK_MOD_48_L, 0, _BIT4|_BIT3|_BIT2);
        MDrv_WriteByteMask(BK_MOD_45_L, 0x00, 0x3F);
        MDrv_Write2Byte(BK_MOD_44_L, 0xFFF);
        u16MOD_TTL |= ( (PANEL_DITHER) ? _BIT6 : _BIT7 );
        if( PANEL_SWAP_ODD_RB ) u16MOD_TTL |= _BIT11;
        if( PANEL_SWAP_ODD_ML ) u16MOD_TTL |= _BIT12;
        if( PANEL_SWAP_EVEN_RB ) u16MOD_TTL |= _BIT13;
        if( PANEL_SWAP_EVEN_ML ) u16MOD_TTL |= _BIT14;

        u16MOD_LVDS = 0;
    }

    MDrv_WriteByteMask(BK_MOD_40_L, u16MOD_LVDS, _BIT6|_BIT5|_BIT2);

    MDrv_Write2Byte( BK_MOD_49_L, u16MOD_TTL );

    if (devPanel_Is_ANALOG_TCON())
    {   // ATCON output enable
        MDrv_Write2Byte(BK_MOD_57_L, 0x0000);
        MDrv_WriteByteMask(BK_MOD_59_L, 0x00, 0xF0);
    }
    else if (devPanel_IsTCON())
    {   // DTCON output enable
        MDrv_Write2Byte( BK_MOD_58_L, SET_DTCON_OEN & 0x3FF );
        MDrv_WriteByte( BK_MOD_59_L, SET_DTCON_SEL & 0x0F );
    }
}

void MDrv_MOD_PowerOff(void)
{
    MDrv_WriteByteMask(BK_MOD_48_L, 0, _BIT4|_BIT3|_BIT2);
    MDrv_WriteByteMask(BK_MOD_45_L, 0x3F, 0x3F); // set [5:0]
    MDrv_Write2Byte(BK_MOD_44_L, 0xFFF);

    if (devPanel_Is_ANALOG_TCON())
    {   // ATCON output disalbe
        MDrv_Write2Byte(BK_MOD_57_L, 0x7FFF);
    }
    else if (devPanel_IsTCON())
    {   // DTCON output disable
        MDrv_Write2Byte(BK_MOD_58_L, 0x03FF);
    }
}

//-----------------------------------------------------------------------------
// DAC
//-----------------------------------------------------------------------------

void MDrv_DAC_PowerOn(void)
{
    // XXX DAC bank is unknown
    MDrv_WriteByteMask(BK_DAC_00_L, 0x8F, 0x8F);
}

void MDrv_DAC_PowerOff(void)
{
    // XXX DAC bank is unknown
    MDrv_WriteByteMask(BK_DAC_00_L, 0x00, 0x8F);
}

//-----------------------------------------------------------------------------
// panel
//-----------------------------------------------------------------------------

void MDrv_Scaler_SetPanelVCC(BOOLEAN bEnable)
{
    // ToDo
    if(bEnable)
    {
        Panel_VCC_ON();
        stSystemInfo.u8PanelPowerStatus |= PANEL_POWER_VCC;
    }
    else
    {
        Panel_VCC_OFF();
        stSystemInfo.u8PanelPowerStatus &= ~PANEL_POWER_VCC;
    }
}

void MDrv_Scaler_SetPanelBacklight(BOOLEAN bEnable)
{
    // ToDo
    if(bEnable)
    {
        Panel_Backlight_VCC_ON();
        stSystemInfo.u8PanelPowerStatus |= PANEL_POWER_LIGHT_ON;
    }
    else
    {
        Panel_Backlight_VCC_OFF();
        stSystemInfo.u8PanelPowerStatus &= ~PANEL_POWER_LIGHT_ON;
    }
}

    //lachesis_070304
U32 g_u32LVDSDataEnableTime = 0;
BOOLEAN g_bIsPanelOnTimingCheckValid = 0;

void MDrv_Scaler_SetPanelOnOff(BOOLEAN bPanelOn)
{
    U8 u8Bank;
    U32 delayTime;

    if(!bPanelOn)
    {
        SetPanelBacklight(DISABLE);
    }

    /* enable/disable VCC */
    MDrv_Scaler_SetPanelVCC(bPanelOn);

    /* 1st delay time */
    if (bPanelOn)
        delayTime = pnlGetOnTiming1();
    else
        delayTime = pnlGetOffTiming1();

    MDrv_Timer_Delayms(delayTime);

    /* set VOP */
    u8Bank = MDrv_ReadByte(BK_SELECT_00);
    MDrv_WriteByte(BK_SELECT_00, REG_BANK_VOP);
    if (bPanelOn)
    {
        if (devPanel_IsLVDS())
            MDrv_WriteByte(BK_SC_VOP_22_L, 0x11);
        else
            MDrv_WriteByte(BK_SC_VOP_22_L, 0x00);

        MDrv_WriteByte(BK_SC_VOP_46_H, 0x40);

        MDrv_MOD_PowerOn();
    }
    else
    {
        if (devPanel_IsTTL())
            MDrv_WriteByte(BK_SC_VOP_46_L, 0x00);
        else
            MDrv_WriteByte(BK_SC_VOP_46_L, 0xFF);

        MDrv_MOD_PowerOff();
    }
    MDrv_WriteByte(BK_SELECT_00, u8Bank);