drvmode.c

mstar 776 开发的车载dvd

    280, 30,       // HStart, VStart
    2240, 1089, // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,          // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1680x1050 75Hz ()  --> 55
    {//46
    RES_1680X1050, // resolution index
    823, 748,      // HFreq, VFreq
    296, 40,       // HStart, VStart
    2272, 1099, // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,          // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
    },

    // 720x480I 60Hz (YPbPr)  --> 56  Start of YPbPr
    {//47
    RES_720X480, // resolution index
    156, 600,     // HFreq, VFreq
    0x97, 0x1a,   // HStart, VStart	//may_070401_CompPosAdj
    858, 525,     // HTotal, VTotal
    5,           // VTotalTorance
    0x1f,         // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_INTERLACE, // flags
    },

    // 720x480P 60Hz (YPbPr)  --> 57
    {//48
    RES_720X480, // resolution index
    315, 600,     // HFreq, VFreq
    0x97, 0x1b,   // HStart, VStart	//may_070401_CompPosAdj
    858, 525,     // HTotal, VTotal
    5,           // VTotalTorance
    //lachesis_0106
    //0x1f,       // ADC phase
    //0x1B,       // ADC phase
    //lachesis_0109
    0x1F,         // ADC phase
    MD_FLAG_YPBPR_BIT, // flags
    },

    // 720x576I 50Hz (YPbPr)  --> 58
    {//49
    RES_720X576, // resolution index
    156, 500,     // HFreq, VFreq
    0x9A, 0x20,   // HStart, VStart	//may_070401_CompPosAdj
    864, 625,     // HTotal, VTotal
    5,           // VTotalTorance
    0x1f,         // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_INTERLACE, // flags
    },

    // 720x576P 50Hz (YPbPr)  --> 59
    {//50
    RES_720X576, // resolution index
    312, 500,     // HFreq, VFreq
    0x4C, 0x22,   // HStart, VStart	//may_070401_CompPosAdj
    864, 625,     // HTotal, VTotal
    5,           // VTotalTorance
    0x1f,         // ADC phase
    MD_FLAG_YPBPR_BIT, // flags
    },

    // 1280x720P 50Hz (YPbPr)  --> 60
    {//51
    RES_1280X720, // resolution index
    375, 500,      // HFreq, VFreq
    0x100, 0x11,       // HStart, VStart	//may_070401_CompPosAdj
    //0x10B, 0x11,       // HStart, VStart
    1980, 750,    // HTotal, VTotal
    5,           // VTotalTorance
    //lachesis_070105 for finetune
    //0x05,        // ADC phase
    0x1B,          // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT, // flags
    },

    // 1280x720P 60Hz (YPbPr)  --> 61
    {//52
    RES_1280X720, // resolution index
    450, 600,      // HFreq, VFreq
    0x101, 0x0f,       // HStart, VStart	//may_070401_CompPosAdj
    //0x10B, 0x11,       // HStart, VStart
    1650, 750,    // HTotal, VTotal
    5,           // VTotalTorance
    //lachesis_070105 finetune
    //0x05,        // ADC phase
    0x1B,          // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT , // flags
    },

    // 1920x1080i 50Hz (YPbPr)  --> 62
    {//53
    RES_1920X1080, // resolution index
    281, 500,       // HFreq, VFreq
    0xbe, 0x18,     // HStart, VStart	//may_070401_CompPosAdj
    //0xC7, 0x1B,     // HStart, VStart
    2640, 1125, // HTotal, VTotal (patch)
    5,           // VTotalTorance

    //lachesis_070105 finetune
    //0x06,         // ADC phase
    0x1B,          // ADC phase

    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT | MD_FLAG_INTERLACE, // flags
    },

    // 1920x1080i 60Hz (YPbPr)  --> 63
    {//54
    RES_1920X1080, // resolution index
    337, 600,       // HFreq, VFreq
    0xbe, 0x1a,     // HStart, VStart	//may_070401_CompPosAdj
    //0xC7, 0x1B,     // HStart, VStart
    2200, 1125, // HTotal, VTotal (patch)
    5,           // VTotalTorance

    //lachesis_070105 finetune
    //0x05,         // ADC phase
    0x1B,          // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT | MD_FLAG_INTERLACE, // flags
    },

    // 1920x1080P 24Hz (YPbPr)  -->
    {//55
    RES_1920X1080P, // resolution index
    270, 240,       // HFreq, VFreq
    0xea, 0x20,     // HStart, VStart	//may_070401_CompPosAdj
    //0xD0, 0x20,     // HStart, VStart
    2750, 1125, // HTotal, VTotal (patch) 135Hz
    5,           // VTotalTorance
    0x21,           // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT, // flags
    },

    // 1920x1080P 30Hz (YPbPr)  -->
    {//56
    RES_1920X1080P, // resolution index
    337, 300,       // HFreq, VFreq
    0xbc, 0x20,     // HStart, VStart	//may_070401_CompPosAdj
    //0xD0, 0x20,     // HStart, VStart
    2200, 1125, // HTotal, VTotal (patch)  135
    5,           // VTotalTorance
    0x21,           // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT, // flags
    },

    // 1920x1080P 50Hz (YPbPr)  --> 64
    {//57
    RES_1920X1080P, // resolution index
    562, 500,       // HFreq, VFreq
    //0xC6, 0x20,       // HStart, VStart
    //2640, 1125,   // HTotal, VTotal (patch) 148MHz
    0xD0, 0x20,     // HStart, VStart
    2640, 1125, // HTotal, VTotal (patch) 148MHz
    5,           // VTotalTorance
    0x17,           // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT, // flags
    },

    // 1920x1080P 60Hz (YPbPr)  --> 65
    {//58
    RES_1920X1080P, // resolution index
    675, 600,       // HFreq, VFreq
    //0xC6, 0x20,       // HStart, VStart
    //2200, 1125,   // HTotal, VTotal (patch)  148MHz
    0xD0, 0x20,     // HStart, VStart
    2200, 1125, // HTotal, VTotal (patch)  148MHz
    5,           // VTotalTorance
    0x12,           // ADC phase
    MD_FLAG_YPBPR_BIT | MD_FLAG_HDTV_BIT, // flags
    },

    // 1152x870 60Hz    --> 66
    {//59
    RES_1152X870,   // resolution index
    541, 599,       // HFreq, VFreq
    304, 25,        // HStart, VStart
    1520, 903,  // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1280x800 60Hz    --> 67
    {//60
    RES_1280X800,   // resolution index
    495, 598,       // HFreq, VFreq
    154, 36,        // HStart, VStart
    1433, 828,  // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1280x800 75Hz    --> 68
    {//61
    RES_1280X800,   // resolution index
    625, 749,       // HFreq, VFreq
    154, 36,        // HStart, VStart
    1712, 835,  // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1600x1024 60Hz   --> 69
    {//62
    RES_1600X1024,  // resolution index
    637, 601,       // HFreq, VFreq
    154, 20,        // HStart, VStart
    2144, 1060,  // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1600x1024 75Hz   --> 70
    {//63
    RES_1600X1024,  // resolution index
    802, 750,       // HFreq, VFreq
    154, 20,        // HStart, VStart
    2176, 1069,  // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1600x900 60Hz ()  --> 71
    {//64
    RES_1600X900, // resolution index
    557, 598,      // HFreq, VFreq
    232, 25,       // HStart, VStart
    2128, 932,    // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,          // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1600x900 75Hz ()  --> 72
    {//65
    RES_1600X900, // resolution index
    702, 747,      // HFreq, VFreq
    248, 33,       // HStart, VStart
    2160, 940,    // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,          // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 1280x720 75Hz ()  --> 73
    {//66
    RES_1280X720, // resolution index
    564, 750,     // HFreq, VFreq
    288, 42,      // HStart, VStart
    1696, 752,   // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,         // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
    },

    // 640x480 57Hz ()  --> 74
    {//67
    RES_640X480, // resolution index
    300, 571,     // HFreq, VFreq
    138, 31,      // HStart, VStart
    800, 525,     // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,         // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
    },

    // 1360x768 60Hz ()  --> 75
    {//68
    RES_1360X768, // resolution index
    477, 600,     // HFreq, VFreq
    256, 18,      // HStart, VStart
    1792, 795,    // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,         // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
    },

    // 1600x1200 51Hz ()  --> 76
    {//69
    RES_1600X1200, // resolution index
    648, 518,       // HFreq, VFreq
    496, 46,        // HStart, VStart
    2160, 1250, // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,           // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP, //flags
    },

    // 848x480 60Hz ()  --> 77
    {//70
    RES_848X480, // resolution index
    310, 600,     // HFreq, VFreq
    139, 31,      // HStart, VStart
    1088, 517,    // HTotal, VTotal
    5,           // VTotalTorance
    0x12,         // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP, //flags
    },

    // 1280x768 50Hz (925FS 83)  --> 78
    {//MD_1280x768_50   //71
    RES_1280X768, // resolution index
    395, 500,      // HFreq, VFreq
    336, 26,       // HStart, VStart
    1648, 791,    // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,          // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
    },

    //lachesis_070123
    // 1366x768 60Hz ()  --> 79
    {//MD_1366x768_60   925FS_106   72
    RES_1366X768, // resolution index
    471, 600,     // HFreq, VFreq
    256, 18,      // HStart, VStart
    1528, 790,    // HTotal, VTotal
    5,           // VTotalTorance
    0x3f,         // ADC phase
    MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
    },
/*
	// seven 070828_00
	// MD_480x234_60
	// 73
	{
		RES_480X234, // resolution index
		157, 600,     // HFreq, VFreq
		0x3B, 0x1A,   // HStart, VStart
		645, 270,     // HTotal, VTotal
		5,           // VTotalTorance
		0x1F,         // ADC phase
		MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP, //flags
	},
	// end*/

/*    // 800x480 59.48Hz      -->  kevin 071024_0
    {
#if(PANEL_WIDTH > 800)
	    RES_1600X480, // resolution index
#else
        RES_800X480, // resolution index
#endif
        313, 595,    // HFreq, VFreq
        96, 34,     // HStart, VStart // Patch, 27==>23
#if(PANEL_WIDTH > 800)
     	1056*2, 525,   // HTotal, VTotal
#else
        1056, 525,   // HTotal, VTotal
#endif
        25,           // VTotalTorance
        0x3f,        // ADC phase
        MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP | MD_FLAG_POR_HNVN | MD_FLAG_POR_HPVP | MD_FLAG_POR_HPVN,
    },*/

        // 800x480 50Hz      -->  kevin 071029_0
    {
#if(PANEL_WIDTH > 800)
	    RES_1600X480, // resolution index
#else
        RES_800X480, // resolution index
#endif
        313, 500,    // HFreq, VFreq
        96, 34,     // HStart, VStart // Patch, 27==>23
#if(PANEL_WIDTH > 800)