📄 drvmode.c
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////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
// Description: standard mode settings
//
////////////////////////////////////////////////////////////////////////////////
#define DRV_MODE_C
/******************************************************************************/
/* Header Files */
/* ****************************************************************************/
#include <stdlib.h>
#include "board.h"
#include "drvAnalog_DataType.h"
#include "drvScaler.h"
#include "drvMode.h"
#include "drvTimer.h"
#define EURO_HDTV_DBG(p) //p
#define MODE_DBG(p) //p
/********************************************************************************/
/* Local */
/* ******************************************************************************/
#define MODE_NAME(str) str,
code MS_MODE_RESOLUTION astStandardModeResolution[RES_MAXIMUM] =
{
{ 640, 350}, // 00: RES_640X350
{ 640, 400}, // 01: RES_640X400
{ 720, 400}, // 02: RES_720X400
{ 640, 480}, // 03: RES_640X480
{ 800, 600}, // 04: RES_800X600
{ 832, 624}, // 05: RES_832X624
{1024, 768}, // 06: RES_1024X768
{1280, 1024}, // 07: RES_1280X1024
{1600, 1200}, // 08: RES_1600X1200
{1152, 864}, // 09: RES_1152X864
{1152, 870}, // 10: RES_1152X870
{1280, 768}, // 11: RES_1280x768
{1280, 960}, // 12: RES_1280X960
{ 720, 480}, // 13: RES_720X480
{1920, 1080}, // 14: RES_1920X1080
{1280, 720}, // 15: RES_1280X720
{ 720, 576}, // 16: RES_720X576
{1920, 1200}, // 17: RES_1920X1200
{1400, 1050}, // 18: RES_1400X1050
{1440, 900}, // 19: RES_1440X900
{1680, 1050}, // 20: RES_1680X1050
{1280, 800}, // 21: RES_1280X800
{1600, 1024}, // 22: RES_1600X1024
{1600, 900}, // 23: RES_1600X900
{1360, 768}, // 24: RES_1360X768
{848, 480}, // 25: RES_848X480
{1920, 1080}, // 26: RES_1920X1080P
{1366, 768}, // 27: RES_1366X768,
{864, 648}, // 28: RES_864X648,
{480, 234}, // 29: RES_480X234
{800, 480}, // 30: RES_800x480 // kevin 071024_0
{1600, 480}, // 31: RES_1600x480 // kevin 071024_0
};
code MS_PCADC_MODETABLE_TYPE astStandardModeTable[MD_STD_MODE_MAX_INDEX] =
{
// 640x350 70Hz (IBM VGA) --> 0
{//MD_640x350_70 925FS-31 //0
RES_640X350, // resolution index, use 640x400 resolution
315, 700, // HFreq, VFreq
139, 58, // HStart, VStart
800, 449, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVN,
},
#if ENABLE_85HZ
// 640x350 85Hz (VESA) --> 1
{
RES_640X350, // resolution index
379, 851, // HFreq, VFreq
160, 63, // HStart, VStart
832, 445, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVN,
},
#endif // #if ENABLE_85HZ
#if USR_IOUT
// 480x234 60Hz ()
{//1
RES_480X234, // resolution index, use 640x400 resolution
259, 598, // HFreq, VFreq
80, 3, // HStart, VStart
645, 433, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
},
#endif
// 640x350 60Hz () --> 2
{//1
RES_640X350, // resolution index, use 640x400 resolution
314, 592, // HFreq, VFreq
80, 3, // HStart, VStart
800, 369, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
},
// 720x400 70Hz (VGA) --> 3
{//MD_720x400_70 925FS-40 2
RES_720X400, // resolution index
315, 700, // HFreq, VFreq
155, 33, // HStart, VStart
900, 449, // HTotal, VTotal
5, // VTotalTorance
0x06, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP | MD_FLAG_POR_HNVN | MD_FLAG_POR_HPVP | MD_FLAG_POR_HPVN,
},
#if ENABLE_85HZ
// 640x400 85Hz (VESA) --> 4
{
RES_640X400, // resolution index
379, 851, // HFreq, VFreq
160, 44, // HStart, VStart
832, 445, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
},
#endif // #if ENABLE_85HZ
// 640x400 70Hz (IBM VGA) -->5
{//3
RES_640X400, // resolution index
315, 700, // HFreq, VFreq
156, 33, // HStart, VStart
800, 449, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
},
#if ENABLE_85HZ
// 720x400 85Hz (VESA) --> 6
{
RES_720X400, // resolution index
379, 850, // HFreq, VFreq
180, 45, // HStart, VStart
936, 446, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP,
},
#endif // #if ENABLE_85HZ
// 800x480 59.48Hz --> kevin 071031_0
{
#if(PANEL_WIDTH > 800)
RES_1600X480, // resolution index
#else
RES_800X480, // resolution index
#endif
313, 595, // HFreq, VFreq
96, 34, // HStart, VStart // Patch, 27==>23
#if(PANEL_WIDTH > 800)
1056*2, 525, // HTotal, VTotal
#else
1056, 525, // HTotal, VTotal
#endif
25, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP | MD_FLAG_POR_HNVN | MD_FLAG_POR_HPVP | MD_FLAG_POR_HPVN,
},
// 640x480 60Hz (VESA) --> 7
{//MD_640x480_60 925FS-35 //4
RES_640X480, // resolution index
315, 599, // HFreq, VFreq
139, 31, // HStart, VStart
800, 525, // HTotal, VTotal
5, // VTotalTorance
0x12, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
// 640x480 66Hz (MAC) --> 8
{//MD_640x480_66 925FS-36 //5
RES_640X480, // resolution index
350, 667, // HFreq, VFreq
160, 42, // HStart, VStart
864, 525, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
// 640x480 72Hz (VESA) --> 9
{//MD_640x480_72 925FS-37 6
RES_640X480, // resolution index
379, 728, // HFreq, VFreq
168, 31, // HStart, VStart
832, 520, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
// 640x480 75Hz (VESA) --> 10
{//MD_640x480_75 925FS-38 7
RES_640X480, // resolution index
375, 750, // HFreq, VFreq
184, 19, // HStart, VStart
840, 500, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
#if ENABLE_85HZ
// 640x480 85Hz (VESA) --> 11
{
RES_640X480, // resolution index
433, 850, // HFreq, VFreq
136, 28, // HStart, VStart
832, 509, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
#endif // #if ENABLE_85HZ
// 800x600 56Hz (VESA) --> 12
{//MD_800x600_56 925FS-44 8
// 925FS-45(蜡荤)
RES_800X600, // resolution index
352, 562, // HFreq, VFreq
200, 24, // HStart, VStart
1024, 625, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
},
// 800x600 60Hz (VESA) --> 13
{//MD_800x600_60 925FS-46 9
RES_800X600, // resolution index
379, 603, // HFreq, VFreq
216, 23, // HStart, VStart
1056, 628, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
},
// 800x600 72Hz (VESA) --> 14
{//MD_800x600_72 925FS-47 10
RES_800X600, // resolution index
481, 722, // HFreq, VFreq
184, 29, // HStart, VStart
1040, 666, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
},
// 800x600 75Hz (VESA) --> 15
{//MD_800x600_75 925FS-48 11
RES_800X600, // resolution index
469, 750, // HFreq, VFreq
240, 24, // HStart, VStart
1056, 625, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
},
#if ENABLE_85HZ
// 800x600 85Hz (VESA) --> 16
{
RES_800X600, // resolution index
537, 851, // HFreq, VFreq
216, 30, // HStart, VStart
1048, 631, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HPVP,
},
#endif // #if ENABLE_85HZ
// 832x624 75Hz (MAC) --> 17
{//MD_832x624_75 925FS-53 12
RES_832X624, // resolution index
497, 746, // HFreq, VFreq
288, 42, // HStart, VStart
1152, 667, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,//MD_FLAG_POR_HPVP,
},
//lachesis_070125
// 848x480 59Hz () --> 18
{//MD_848x480_59 925FS-55 13
RES_848X480, // resolution index
298, 596, // HFreq, VFreq
174, 12, // HStart, VStart
1056, 500, // HTotal, VTotal
5, // VTotalTorance
0x12, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVP, //flags
},
#if ENABLE_85HZ
// 1024x768 43i (VESA) --> 18
{
RES_1024X768, // resolution index
355, 868, // HFreq, VFreq
232, 24, // HStart, VStart
1264, 817, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_INTERLACE, // flags
},
#endif // #if ENABLE_85HZ
// 1024x768 60Hz (VESA) --> 19
{//MD_1024x768_60 925FS_60 14
RES_1024X768, // resolution index
484, 600, // HFreq, VFreq
295, 35, // HStart, VStart
1344, 806, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
// 1024x768 70Hz (VESA) --> 20
{//MD_1024x768_70 925FS_62 15
RES_1024X768, // resolution index
565, 700, // HFreq, VFreq
280, 35, // HStart, VStart
1328, 806, // HTotal, VTotal
5, // VTotalTorance
0x3f, // ADC phase
MD_FLAG_CHK_POR_BIT | MD_FLAG_POR_HNVN,
},
// 1024x768 75Hz (VESA) --> 21
{//MD_1024x768_75 925FS_65 16
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