drvadc.h

mstar 776 开发的车载dvd

////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
////////////////////////////////////////////////////////////////////////////////

#ifndef DRV_ADC_H
#define DRV_ADC_H

#include "DataType.h"
#include "drvAnalog_DataType.h"
#include "Analog_Reg.h"
#include "drvGlobal.h"
#include "board.h"
#include "Panel.h"


#define ADC_SOG_FILTER_THRSHLD    40

#define ADC_AUTO_OFFSET_MODE      0xFF

/******************************************************************************/
/*                     Macro                                                  */
/* ****************************************************************************/

#define LPF_CTL_VD_443      0
#define LPF_CTL_VD_358      1
#define LPF_CTL_ANALOG_PORT 2
#define LPF_CTL_TV_STRONG   3
#define LPF_CTL_TV_NORMAL   4
#define LPF_CTL_TURN_OFF    0xFF

// ADC PLL coeficient
#define ADC_BANDWIDTH_CLK_THRSHLD0    6 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD1    14 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD2    15 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD3    16 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD4    17 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD5    18 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD6    20 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD7    21 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD8    23 // 8/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD9    25 // 20/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD10    30 // 50/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD11    60 // 100/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD12    120 // 200/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD13    150 // 300/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD14    190 // 400/0.75
#define ADC_BANDWIDTH_CLK_THRSHLD15    260 // 500/0.75

//------------------------------------------------------------------------------
// ADC ATOP
//------------------------------------------------------------------------------
#define ADC_ATOP_BASE            0x2500

//------------------------------------------------------------------------------
// ADC DTOP
//------------------------------------------------------------------------------
#define ADC_DTOP_BASE            0x2600

//******************************************************************************
//          Structures
//******************************************************************************
#ifdef DRV_ADC_C
#define INTERFACE
#else
#define INTERFACE extern
#endif

/********************************************************************************/
/*                   Function Prototypes                     */
/********************************************************************************/
INTERFACE void MDrv_ADC_SetVcoControl (MS_INPUT_SOURCE_TYPE enInputSourceType, U8 u8InputClock);
INTERFACE void MDrv_ADC_SetADCPLL ( U8 u8PixelClk );
INTERFACE void MDrv_ADC_SetADCClk ( U16 u16Value );
INTERFACE void MDrv_ADC_SetADCPhase ( U8 u8Value );
INTERFACE void MDrv_ADC_SetOffset ( MS_ADC_SETTING *pstADCSetting  );
INTERFACE void MDrv_ADC_SetGain ( MS_ADC_SETTING *pstADCSetting  );
INTERFACE void MDrv_ADC_ResetGainOffset ( void );
INTERFACE void MDrv_ADC_AdjustBacklight ( U8 u8Backlight );
INTERFACE void MDrv_ADC_SetAutoADC(BIT bEnable, BIT bIsYPbPrFlag);
INTERFACE void MDrv_ADC_SetPllMul( U8 u8Value);
INTERFACE void MDrv_ADC_Init(void);
INTERFACE void MDrv_ADC_SetDoubleBuffer(BOOLEAN bEnable);
INTERFACE void MDrv_ADC_SetSogFilter(U8 u8PixClk);
INTERFACE void MDrv_ADC_SetClampDuration(U8 u8Value);
INTERFACE void MDrv_ADC_SetClampPlacement(U8 u8Value);
INTERFACE void MDrv_ADC_SetInputHsyncPolarity(BOOLEAN bHightActive,EN_INPUT_PORT_TYPE enInputPortType);
INTERFACE void MDrv_ADC_SetForDvi(void);

//
// power
//
INTERFACE void MDrv_ADC_PowerOn(MS_ADC_POWER_ON_TYPE enADCPowerType);
INTERFACE void MDrv_ADC_PowerOff(void);

//
// MUX
//
MS_ADC_POWER_ON_TYPE MDrv_ADC_SetMUX(EN_INPUT_PORT_TYPE enInputPortType, U8 u8InputSrcMux, U8 u8VDYMux, U8 u8VDCMux);

#undef INTERFACE

#endif // DRV_ADC_H