drvvd.h

mstar 776 开发的车载dvd

////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
////////////////////////////////////////////////////////////////////////////////

#ifndef DRV_VD_H
#define DRV_VD_H


#include "DataType.h"


#include "drvAnalog_DataType.h"
#include "Analog_Reg.h"
#include "drvGlobal.h"
#include "Board.h"
#include "Bin_ID.h"



/********************************************************************************/
/*                     Macro                    */
/* ******************************************************************************/

//   BK_AFEC_DC
#define MSK_UD7_BANK            0x03
#define VAL_UD7_BANK6           0x00
#define VAL_UD7_BANK7           0x01
#define MSK_UD7_STATE           0x0C
#define VAL_UD7_FREE            0x00
#define VAL_UD7_READ            0x04
#define VAL_UD7_WRITE           0x08
#define VAL_UD7_READ_END        0x0C

// input source selection
// VD main channel
#define MSVD_MAIN_CVBS0    IP_CH0_Y
#define MSVD_MAIN_CVBS1    IP_CH1_Y
#define MSVD_MAIN_CVBS2    IP_CH2_Y
#define MSVD_MAIN_CVBS3    IP_CH3_Y

#define MSVD_MAIN_SY0      IP_CH4_Y
#define MSVD_MAIN_SY1      IP_CH5_Y
#define MSVD_MAIN_SC0      IP_CH6_Y
#define MSVD_MAIN_SC1      IP_CH7_Y

#define MSVB_SUB_NONE      IP_NONE_C
#define MSVB_SUB_FB0       IP_FB_RGB0 // scart fast blanking switch(CVBS<->RGB)
#define MSVB_SUB_FB1       IP_FB_RGB1
#define MSVB_SUB_FB2       IP_FB_RGB2

#define MSVD_SUB_SY0       IP_CH4_Y0
#define MSVD_SUB_SY1       IP_CH5_Y1
#define MSVD_SUB_SC0       IP_CH6_C0
#define MSVD_SUB_SC1       IP_CH7_C1

#define VD_USE_FB           0
//#if (VD_USE_FB && (RAM_TYPE==SDR_1Mx16_1))
//    #define VD_HT_MUX  (0.70)
//#else
//    #define VD_HT_MUX  (1.5)
//#endif

#if (VD_HT_TYPE==VD_HT_NORMAL)
#define VD_HT_NTSC         910
#define VD_HT_PAL          1135
#define VD_HT_SECAM        1097
#define VD_HT_NTSC_443     1127
#define VD_HT_PAL_M        909
#define VD_HT_PAL_NC       917
#elif (VD_HT_TYPE==VD_HT_FIX1135)
#define VD_HT_NTSC         (1135*3/2)
#define VD_HT_PAL          (1135*3/2)
#define VD_HT_SECAM        (1135*3/2)
#define VD_HT_NTSC_443     (1135*3/2)
#define VD_HT_PAL_M        (1135*3/2)
#define VD_HT_PAL_NC       (1135*3/2)
#elif (VD_HT_TYPE==VD_HT_MUL15)
#define VD_HT_NTSC         (910*3/2)
#define VD_HT_PAL          (1135*3/2)
#define VD_HT_SECAM        (1097*3/2)
#define VD_HT_NTSC_443     (1127*3/2)
#define VD_HT_PAL_M        (909*3/2)
#define VD_HT_PAL_NC       (917*3/2)
#endif

#define MSVD_HACTIVE_NTSC       (((U32)720*VD_HT_NTSC+429)/858)
#define MSVD_HACTIVE_PAL        (((U32)720*VD_HT_PAL+432)/864)
#define MSVD_HACTIVE_SECAM      (((U32)720*VD_HT_SECAM+432)/864)
#define MSVD_HACTIVE_NTSC_443   (((U32)720*VD_HT_NTSC_443+432)/864)
#define MSVD_HACTIVE_PAL_M      (((U32)720*VD_HT_PAL_M+429)/858)
#define MSVD_HACTIVE_PAL_NC     (((U32)720*VD_HT_PAL_NC+429)/858)


//*************************************************************************
//          Enums
//*************************************************************************



//*************************************************************************
//          Structures
//*************************************************************************


#ifdef DRV_VD_C
#define INTERFACE
#else
#define INTERFACE extern
#endif


#ifdef DRV_VD_C
INTERFACE U16 g_u16VdBinSel = BIN_ID_CODE_VD_DSP;
#else
INTERFACE U16 g_u16VdBinSel;
#endif


/********************************************************************************/
/*                   Function Prototypes                     */
/********************************************************************************/
INTERFACE void MDrv_VD_SetRegFromDSP ( void);
INTERFACE U16  MDrv_VD_GetStatus ( void );
INTERFACE U16  MDrv_VD_GetWSS( void );
INTERFACE void MDrv_VD_RegInit ( void );
INTERFACE void MDrv_VD_LoadDSPCode ( void );
INTERFACE void MDrv_VD_ProgMultiInput ( MS_SYS_INFO *penMsSysInfo );
INTERFACE void MDrv_VD_ProgramDiffField ( EN_VD_SIGNALTYPE enSignalType, MS_SYS_INFO *penMsSysInfo );
INTERFACE void MDrv_VDMCU_Init(U32 u32src, U32 u32dst, U32 u32len);
INTERFACE void MDrv_VD_McuReset( U16 u16DelayTime );
INTERFACE void MDrv_VD_Parameter_Initial( void );
//LACHESIS_070110
INTERFACE void MDrv_VD_SetBlacklevel( U16 u16Blacklevel );

INTERFACE void MDrv_VD_SetCombContrast(U8 u8Contrast);
INTERFACE void MDrv_VD_SetCombBrightness(U8 u8Brightness);

INTERFACE void MDrv_VD_SetupComb( EN_INPUT_PORT_TYPE enInputPortType );
INTERFACE void MDrv_VD_EnableCVBSLPF(BOOLEAN bEnable);


/* H sensitivity related APIs */
// for normal
#define HSEN_NORMAL_DETECT_WIN_BEFORE_LOCK      0x08    // 4 bits, HSYNC detect window before lock used when normal mode
#define HSEN_NORMAL_DETECT_WIN_AFTER_LOCK       0x08    // 4 bits, HSYNC detect window after lock used when normal mode
#define HSEN_NORMAL_CNTR_FAIL_BEFORE_LOCK       0x0F    // 4 bits, cntr_fail before lock used when normal mode
#define HSEN_NORMAL_CNTR_SYNC_BEFORE_LOCK       0x10    // 6 bits, cntr_sync before lock used when normal mode
#define HSEN_NORMAL_CNTR_SYNC_AFTER_LOCK        0x1C    // 6 bits, cntr_sync after lock used when normal mode

// for channel scan
#define HSEN_CHAN_SCAN_DETECT_WIN_BEFORE_LOCK   0x03    // 4 bits, HSYNC detect window before lock used when channel scan
#define HSEN_CHAN_SCAN_DETECT_WIN_AFTER_LOCK    0x03    // 4 bits, HSYNC detect window after lock used when channel scan
#define HSEN_CHAN_SCAN_CNTR_FAIL_BEFORE_LOCK    0x08    // 4 bits, cntr_fail before lock used when channel scan
#define HSEN_CHAN_SCAN_CNTR_SYNC_BEFORE_LOCK    0x30    // 6 bits, cntr_sync before lock used when channel scan
#define HSEN_CHAN_SCAN_CNTR_SYNC_AFTER_LOCK     0x05    // 6 bits, cntr_sync after lock used when channel scan

INTERFACE void MDrv_VD_Hsen_Set_Detect_Win (U8 u8DetectWinBeforeLock, U8 u8DetectWinAfterLock);
INTERFACE void MDrv_VD_Hsen_Set_Cntr_Before_Lock (U8 u8CntrFail, U8 u8CntrSync);
INTERFACE void MDrv_VD_Hsen_Set_Cntr_After_Lock (U8 u8CntrSync);


/* H/V slice level related APIs */
INTERFACE void MDrv_VD_Slice_Set_Mode (U8 u8SliceMode);
INTERFACE void MDrv_VD_Slice_Set_V_Level (U8 u8VLevel);
INTERFACE void MDrv_VD_Slice_Set_H_Level (U8 u8HLevel);


/* AGC related APIs */
INTERFACE void MDrv_VD_AGC_Set_Mode (U8 u8AgcMode);
INTERFACE void MDrv_VD_AGC_Set_Coarse_Gain (U8 u8AgcCoarseGain);
INTERFACE void MDrv_VD_AGC_Set_Fine_Gain (U16 u16AgcFineGain);


/* Color kill level control related APIs */
INTERFACE void MDrv_VD_Color_Kill_Level (U8 u8ColorKillLevel);


// TODO: Review needed
/* ====== create new VD driver APIs for moving down the code that accesses registers directly to driver ====== */
// INTERFACE void MDrv_VD_SetAutoHtotal (BOOLEAN bEnable); <- disable for Saturn2 temporarily
// INTERFACE void MDrv_VD_ColorShift (void); <- disable for Saturn2 temporarily
INTERFACE void MDrv_VD_SetGmcTune (U8 regVal);
INTERFACE U16 MDrv_VD_Scan_HsyncCheck(void);
INTERFACE U8 MDrv_VD_CheckTVSys(void);

INTERFACE U16 MDrv_VD_GetHsyncCountAndVdStatus1stCheck (U16 *pwCurrentStatus);

INTERFACE U16 MDrv_VD_GetHsyncCountAndVdStatus2ndCheck (void);


#undef INTERFACE




#endif