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📄 drvisr.h

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////////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2006-2007 MStar Semiconductor, Inc.
// All rights reserved.
//
// Unless otherwise stipulated in writing, any and all information contained
// herein regardless in any format shall remain the sole proprietary of
// MStar Semiconductor Inc. and be kept in strict confidence
// (¨MStar Confidential Information〃) by the recipient.
// Any unauthorized act including without limitation unauthorized disclosure,
// copying, use, reproduction, sale, distribution, modification, disassembling,
// reverse engineering and compiling of the contents of MStar Confidential
// Information is unlawful and strictly prohibited. MStar hereby reserves the
// rights to any and all damages, losses, costs and expenses resulting therefrom.
//
// Description: Interrupt Service Routines
//
////////////////////////////////////////////////////////////////////////////////

#ifndef _DRV_ISR_H_
#define _DRV_ISR_H_

/******************************************************************************/
// Interrupt priority groups
//          Highest     Middle      Lowest
// Group0   EX0         EX7         SERIAL1
// Group1   TIMER0      EX2         EX8
// Group2   EX1         EX3         EX9
// Group3   TIMER1      EX4         EX10
// Group4   SERIAL0     EX5         EX11
// Group5   TIMER2      EX6         EX12
//
// Interrupt priority levels
// 0    Lowest
// 1
// 2
// 3    Highest
/******************************************************************************/

// customized for priority of group 0 ~ 5
#define INT_GRP0_PRIO       2
#define INT_GRP1_PRIO       2
#define INT_GRP2_PRIO       3   // Now EX1 must be 3, sec isr use it
#define INT_GRP3_PRIO       1
#define INT_GRP4_PRIO       1
#define INT_GRP5_PRIO       1

// customized for register bank of priority 0 ~ 3
#define INT_PRIO0_REGBANK   0
#define INT_PRIO1_REGBANK   1
#define INT_PRIO2_REGBANK   2
#define INT_PRIO3_REGBANK   3

//
// Following data is from R8051XC design spec, not customizable value
//

//      interrupt      keil C number   source   description
#define INT_EX0             0       // ie0      External interrupt 0
#define INT_TIMER0          1       // tf0      Timer 0 overflow
#define INT_EX1             2       // ie1      External interrupt 1
#define INT_TIMER1          3       // tf1      Timer1 overflow
#define INT_SERIAL0         4       // riti0    Serial port 0 interrupt
#define INT_TIMER2          5       // tfexf2   Timer2 interrupt
#define INT_EX7             8       // iex7     External interrupt 7
#define INT_EX2             9       // iex2     External interrupt 2
#define INT_EX3             10      // iex3     External interrupt 3
#define INT_EX4             11      // iex4     External interrupt 4
#define INT_EX5             12      // iex5     External interrupt 5
#define INT_EX6             13      // iex6     External interrupt 6
#define INT_SERIAL1         16      // riti1    Serial port 1 interrupt
#define INT_EX8             17      // iex8     External interrupt 8
#define INT_EX9             18      // iex9     External interrupt 9
#define INT_EX10            19      // iex10    External interrupt 10
#define INT_EX11            20      // iex11    External interrupt 11
#define INT_EX12            21      // iex12    External interrupt 12

// interrupt to group mapping
#define INT_GROUP_EX0       0
#define INT_GROUP_EX7       0
#define INT_GROUP_SERIAL1   0
#define INT_GROUP_TIMER0    1
#define INT_GROUP_EX2       1
#define INT_GROUP_EX8       1
#define INT_GROUP_EX1       2
#define INT_GROUP_EX3       2
#define INT_GROUP_EX9       2
#define INT_GROUP_TIMER1    3
#define INT_GROUP_EX4       3
#define INT_GROUP_EX10      3
#define INT_GROUP_SERIAL0   4
#define INT_GROUP_EX5       4
#define INT_GROUP_EX11      4
#define INT_GROUP_TIMER2    5
#define INT_GROUP_EX6       5
#define INT_GROUP_EX12      5

// get group of irq
#define INT_GROUP( irq )    CONCAT( INT_GROUP_, irq )

// get priority of irq
#define INT_PRIO( irq )     CONCAT( INT_GRP, CONCAT( INT_GROUP( irq ), _PRIO ) )

// get default register bank of irq
#define INT_REGBANK( irq )  CONCAT( INT_PRIO, CONCAT( INT_PRIO( irq ), _REGBANK ) )

#ifdef _DRV_ISR_C_
#define INTERFACE
#else
#define INTERFACE extern
#endif

INTERFACE U32 volatile data gTimerCount0;
INTERFACE U32 volatile data gTimerDownCount0;
INTERFACE U32 volatile data gTimerDownCount1;

INTERFACE U32 volatile      g100msTimeCount;
INTERFACE U8                gu8100msTH;
#ifdef USE_TIMER0_FOR_SYSTEM_TIME                   // remove this block later
INTERFACE U16               gu16SystemTimePeriodTH;
#endif

#undef INTERFACE

#endif /* _DRV_ISR_H_ */

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