drvgop.c

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        }
    else
    {
            GOP_DEBUGINFO(printf("Warning: Unlikely to get in here: fbId(%bx), curAdr(%lx), lastAdr(%lx)\r\n", index, curStartAdr, lastAddr));
    }

        gwinFB[index].addr = lastAddr;
        lastAddr = gwinFB[index].addr + gwinFB[index].size;

    }

    //MDrv_GOP_GWIN_Switch2Win(MDrv_GOP_GWIN_GetCurrentWinId());  // seems unnecessary
    gwinFB[fbId].addr = *addr = lastAddr;

    return;
}

/********************************************************************************/
/*                   Functions                      */
/********************************************************************************/
/********************************************************************************/
/// Confirm modification of GOP register.
/// Basically MCU will wait to H sync for register update.
/// If timeout, use force write automatically.
/********************************************************************************/
static void GOP_GWIN_UpdateReg()
{
    U16 reg_val;
    goptimeout = 0;

    // temp for S3+
    if (gop_gwin_frwr)
    {
        GOP_Write16Reg(GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
        GOP_Write16Reg(GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
    }
    else
    {

        GOP_Write16Reg(GOP_BAK_SEL, GOP_VAL_WR, GOP_REG_HW_MASK);
        GOP_Write16Reg(GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);

        if (current_bank <= 2)
        {
            do
            {
                GOP_Read16Reg(GOP_BAK_SEL, &reg_val);
                goptimeout++;
             }
            while( (reg_val&(0x1000 ))&&(goptimeout<=GOP_TIMEOUT_CNT) );
        }
        else
        {
            printf("Bank incorrect. UpdateReg failed.\r\n");
        }
        // Perform force write if wr timeout.
        if(goptimeout > GOP_TIMEOUT_CNT)
        {
            printf("Perform fwr if wr timeout!!\r\n");
            GOP_Write16Reg(GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
            GOP_Write16Reg(GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
        }
    }
}

#if 0
/********************************************************************************/
static void GOP_DWIN_UpdateReg()
{
    U16 reg_val;

    if(gop_dwin_frwr)
    {
        GOP_Write16Reg(GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_WORD_MASK);
    }
    else
    {
        do
        {
            GOP_Read16Reg(GOP_BAK_SEL, &reg_val);
        }
        while(reg_val!=0);

        GOP_Write16Reg(GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_WORD_MASK);

        do
        {
            GOP_Read16Reg(GOP_BAK_SEL, &reg_val);
        }
        while(reg_val!=0);
    }

}
#endif

/********************************************************************************/
/// Initialize the GOP,
/// Must be called after MDrv_GE_Init()
/********************************************************************************/
void MDrv_GOP_Init()
{
    U8 i, j;
    gop_gwin_frwr = TRUE;
    gop_dwin_frwr = FALSE;
    Gwin_H_Dup = FALSE;
    Gwin_V_Dup = FALSE;
    current_bank = 0;
    // Need switch bank to GWIN0 ??

// Addy 20071031
    u16GOP_PDOffset = 60;

    GOP_Write16Reg(GOP_BAK_SEL, 0x0000, GOP_REG_WORD_MASK);

#if 0   // ECO workaround.
    GOP_Set_Reg(GOP_VSRIUSYNC, GOP_Get_Reg(GOP_VSRIUSYNC) | 0x02);
    GOP_Set_Reg(GOP_PERFFIX, GOP_Get_Reg(GOP_PERFFIX) | 0x03);
    GOP_Set_Reg(GOP_VSYNCSWITCH, GOP_Get_Reg(GOP_VSYNCSWITCH) | 0x01);
    GOP_Set_Reg(GOP_BUFCHEAT, GOP_Get_Reg(GOP_BUFCHEAT) | 0x03);
#endif
    GOP_Write16Reg(GOP_MIU_RD_TSH, GOP_BUF_MIU_RD_TH_H_WORKING, GOP_REG_WORD_MASK);
    GOP_GWIN_UpdateReg();
    MDrv_Timer_Delayms(GOP_GWIN_INIT_DELAY);
    GOP_Write16Reg(GOP_GWIN_EN, 0x10, GOP_REG_WORD_MASK);          // soft reset
    GOP_Write16Reg(GOP_GWIN_EN, 0x00, GOP_REG_WORD_MASK);          // soft reset

    // Need switch bank to DWIN ??
    GOP_Write16Reg(GOP_BAK_SEL, 0x0002, GOP_REG_WORD_MASK);
    GOP_Write16Reg(GOP_DW_CTL0_EN, 0x32, GOP_REG_WORD_MASK);

    GOP_Write16Reg(GOP_BAK_SEL, 0x0000, GOP_REG_WORD_MASK);
    MDrv_GOP_GWIN_EnableProgressive(TRUE);
    MDrv_Scaler_Set_GOPSel(MS_NIP_SEL_GOP0);
    MDrv_GOP_DstPlane_Set(0, E_GOP_DST_OP0);            // Set OP as GOP destination
    GOP_Write16Reg(GOP_PDATA_WR, 0x0000, 0x00C8);       // Enable RGB output

//    GOP_Write16Reg(GOP_PDATA_WR, ((U16)GOP_PD_SHIFT << 8) , 0xff00);   // Set GOP shift

    GOP_Write16Reg(GOP_PDATA_WR, ((U16)GOP_PD_SHIFT  << 8) | _BIT5, 0xff30);   // Set GOP shift

    GOP_Write16Reg(GOP_PSHIFT, ((U16)0x00FF), 0x00FF);   // Set GOP shift

    GOP_GWIN_UpdateReg();
    // enable blink capability - for ttx usage
    GOP_Write16Reg(GOP_BLINK, 0x0098, GOP_REG_WORD_MASK);

    MDrv_GOP_GWIN_SetPalette();
    MDrv_GOP_GWIN_Init();
    /* Clear non-common fields for better initialization */

    i = j = 0;

    while(j < 2 )
    {
        i = 0;
        GOP_Write16Reg(GOP_BAK_SEL, j, GOP_REG_WORD_MASK);
        while( i < 4 )
        {
            GOP_Write16Reg(GOP_GWIN_DRAM_HSTR(i), 0, GOP_REG_WORD_MASK);
            GOP_Write16Reg(GOP_GWIN_VSTOP_L(i), 0, GOP_REG_WORD_MASK);
            GOP_Write16Reg(GOP_GWIN_VSTOP_H(i), 0, GOP_REG_WORD_MASK);
            GOP_Write16Reg(GOP_GWIN_HSTOP_L(i), 0, GOP_REG_WORD_MASK);
            i++;
        }
        GOP_Write16Reg(GOP_GWIN_ALPHA01, 0x0000, GOP_REG_WORD_MASK);
        GOP_Write16Reg(GOP_GWIN_ALPHA23, 0x0000, GOP_REG_WORD_MASK);
        #if(defined(S3PLUS))
        GOP_Write16Reg(GOP_GWIN_EN, 0x200, 0x200);          // set input field inverse
        #endif
        j++;
    }

    // Initial GOP1 setting
//        MDrv_WriteByte(BK_SELECT_00, REG_BANK_VOP);     // Set OP inverse Alpha
//    MDrv_WriteByteMask(L_BK_IP2F1(0x23), 0x20, 0x20);

    GOP_Write16Reg(GOP_GWIN_EN, 0x0000, 0x0010); // Release reset

        MDrv_GOP_GWIN_EnableProgressive(TRUE);
    GOP_Write16Reg(GOP_PDATA_WR, 0x0000, 0x00C8);   // Enable RGB output
    MDrv_GOP_GWIN_SetTransClr_8888(0, 0);

    MDrv_GOP_GWIN_EnableTransClr(0, true);

    GOP_Write16Reg(GOP_PSHIFT, ((U16)0x00FF), 0x00FF);   // Set GOP shift

    GOP_Write16Reg(GOP_PDATA_WR, ((U16)GOP_PD_SHIFT2   << 8), 0xff00);   // Set GOP shift      // IP 44 - 3
    GOP_Write16Reg(GOP_GWIN_EN, 0x0000, 0x00C0);        // Clear H/V sync
    MDrv_Scaler_Set_GOPSel(MS_NIP_SEL_GOP1);
    MDrv_GOP_DstPlane_Set(1, E_GOP_DST_OP1);            // Set IP as GOP1 destination
    MDrv_Scaler_Set_GOPEnable(1, true);
    MDrv_ChipTop_SetGOPClk(1, E_GOP_DST_OP0);
    gop_gwin_frwr = FALSE;

}


/********************************************************************************/
/// Enable GWIN for display
/// @param u8win \b IN GWIN id
/// @param bEnable \b IN
///   - # TRUE Show GWIN
///   - # FALSE Hide GWIN
/********************************************************************************/
void MDrv_GOP_GWIN_Enable(U8 u8win, BOOLEAN bEnable)
{
    U16 regval;
    U8 fbId;

    GOP_DEBUGINFO( printf("MDrv_GOP_GWIN_Enable(gId=%bd) == %bx\n",u8win, bEnable));
    if (u8win >= MAX_GWIN_SUPPORT )
    {
        msWarning(ERR_GWIN_ID_OUT_OF_RANGE);
        return;
    }

    fbId = gwinMap[u8win];

    if ((fbId == GWIN_ID_INVALID) || (gwinFB[fbId].allocated== FALSE))
    {
        msWarning(ERR_GWIN_ID_NOT_ALLOCATED);
        GOP_DEBUGINFO( printf("MDrv_GOP_GWIN_Enable: gId=%bd not allocated\n",u8win));
        return;
    }
    gwinFB[fbId].enable = bEnable;

    GOP_Read16Reg(GOP_GWIN_EN, &regval);
    if(u8win >=4)
        u8win-=4;
    if(bEnable)
    {
        regval &= ~0x0010;  // Clear software reset
        regval |= (1 << u8win);
    }
    else
    {
        regval &= ~(1 << u8win);
    }

    #if 0//(PANEL_ATCON || PANEL_DTCON)
        regval |= BIT6;
    #endif

    if ((regval & 0x0f) == 0)   // All GWINs are disabled
    {
        GOP_Write16Reg(GOP_GWIN_EN, regval, GOP_REG_WORD_MASK);
        GOP_GWIN_UpdateReg();
    }
    else
    {
        GOP_Write16Reg(GOP_GWIN_EN, regval, GOP_REG_WORD_MASK);
        GOP_GWIN_UpdateReg();
    }
}

#if 0       // Duplicate function. Obsolete.
/********************************************************************************/
/// Check if specified GWIN is enabled
/********************************************************************************/
BOOLEAN MDrv_GOP_GWIN_IsAllGWINDisabled(void){
    U16 regval;

    GOP_Read16Reg(GOP_GWIN_EN, &regval);

    if ((regval & 0x0f) == 0)
    {
       return TRUE;
    }
    else
    {
       return FALSE;
    }
}
#endif

/********************************************************************************/
/// Check if a specific GWIN is enabled.
/// @param u8win \b IN ID of GWIN gonna check
/********************************************************************************/
BOOLEAN MDrv_GOP_GWIN_IsGWINEnabled(U8 u8win){
    U16 regval;
    if (u8win >= MAX_GWIN_SUPPORT )
    {
        msWarning(ERR_GWIN_ID_OUT_OF_RANGE);
        return FALSE;
    }

    GOP_Read16Reg(GOP_GWIN_EN, &regval);
    return  regval & (1 << u8win);
}

/********************************************************************************/
/// Check if GWIN is enabled
/********************************************************************************/
BOOLEAN MDrv_GOP_GWIN_IsEnabled(void){
    U16 regval;

    GOP_Read16Reg(GOP_GWIN_EN, &regval);
    return  regval & (0xF) ? TRUE : FALSE;
}

#if ( KEEP_UNUSED_FUNC == 1 )
/********************************************************************************/
/// Reset GWIN
/********************************************************************************/
void MDrv_GOP_GWIN_Reset(){
    U8 u8Idx;
    U16 regval;

    GOP_Read16Reg(GOP_GWIN_EN, &regval);
    for (u8Idx=0; u8Idx<MAX_GWIN_SUPPORT; u8Idx++)
    {
        regval |= ((gwinFB[gwinMap[u8Idx]].enable & 0x01) << u8Idx);
    }

//    GOP_Set_Reg(GOP_GWIN_EN, 0x10);
    GOP_Write16Reg(GOP_GWIN_EN, 0x0010, GOP_REG_WORD_MASK);
//    GOP_Set_Reg(GOP_GWIN_EN, 0x00);
    GOP_Write16Reg(GOP_GWIN_EN, 0x0000, GOP_REG_WORD_MASK);
    GOP_Write16Reg(GOP_GWIN_EN, regval, GOP_REG_WORD_MASK);
//    GOP_Set_Reg(GOP_GWIN_EN, regval & 0xEF);
    GOP_GWIN_UpdateReg();
//    MDrv_Timer_Delayms(GOP_GWIN_RESET_DELAY);

}





#if (GOP_TEST_CODE == 1)
/********************************************************************************/
/// Set GWIN horizontal pixel duplication
/// @param bEnable \b IN
///   - # TRUE Enable GWIN horizontal pixel duplication
///   - # FALSE Disable GWIN horizontal pixel duplication
/********************************************************************************/
void MDrv_GOP_GWIN_EnableHDup(BOOLEAN bEnable)
{
    U16 regval;

    GOP_Read16Reg(GOP_GWIN_EN, &regval);

    if(bEnable) {
        regval |= 0x400;
        Gwin_H_Dup = true;
    }
    else {
        regval &= ~0x400;
        Gwin_H_Dup = false;
    }

    GOP_Write16Reg(GOP_GWIN_EN, regval, GOP_REG_WORD_MASK);

    GOP_GWIN_UpdateReg();

}

/********************************************************************************/
/// Set GWIN vertical line duplication
/// @param bEnable
///   - # TRUE Enable GWIN vertical line duplication
///   - # FALSE Disable GWIN vertical line duplication
/********************************************************************************/
void MDrv_GOP_GWIN_EnableVDup(BOOLEAN bEnable)
{
    U16 regval;
    GOP_Read16Reg(GOP_GWIN_EN, &regval);

    if(bEnable) {
        regval |= 0x800;
        Gwin_V_Dup = true;
    }
    else {
        regval &= ~0x800;
        Gwin_V_Dup = false;
    }
    GOP_Write16Reg(GOP_GWIN_EN, regval, GOP_REG_WORD_MASK);