📄 top.vwf

📁 基于FPGA有限状态机的数据采集系统
💻 VWF
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	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("addre[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("addre[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("addre[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("addre[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("addre[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("rd_ram")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("ready")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("st[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 80000.0;
	}
}

TRANSITION_LIST("st[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 80000.0;
	}
}

TRANSITION_LIST("wr_ram")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("full")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataout[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("dataram[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 80000.0;
	}
}

TRANSITION_LIST("clk_cpu")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 1066;
			LEVEL 0 FOR 37.5;
			LEVEL 1 FOR 37.5;
		}
		LEVEL 0 FOR 37.5;
		LEVEL 1 FOR 12.5;
	}
}

TRANSITION_LIST("clkin")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 3200;
			LEVEL 0 FOR 12.5;
			LEVEL 1 FOR 12.5;
		}
	}
}

TRANSITION_LIST("clk_test")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 80000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "clkin";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "clk_cpu";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "clk_test";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 2;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "rst";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 3;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "full";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 4;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ready";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 5;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "change";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 6;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "st";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 7;
	TREE_LEVEL = 0;
	CHILDREN = 8, 9;
}

DISPLAY_LINE
{
	CHANNEL = "st[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "st[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 7;
}

DISPLAY_LINE
{
	CHANNEL = "addre";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 10;
	TREE_LEVEL = 0;
	CHILDREN = 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28;
}

DISPLAY_LINE
{
	CHANNEL = "addre[17]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[16]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[15]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 23;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 24;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 25;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "addre[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "datain";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 29;
	TREE_LEVEL = 0;
	CHILDREN = 30, 31, 32, 33, 34, 35, 36, 37;
}

DISPLAY_LINE
{
	CHANNEL = "datain[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 30;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 33;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 34;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "datain[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "dataram";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 38;
	TREE_LEVEL = 0;
	CHILDREN = 39, 40, 41, 42, 43, 44, 45, 46;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 39;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 40;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 41;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 42;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 43;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 44;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 45;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataram[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 46;
	TREE_LEVEL = 1;
	PARENT = 38;
}

DISPLAY_LINE
{
	CHANNEL = "dataout";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 47;
	TREE_LEVEL = 0;
	CHILDREN = 48, 49, 50, 51, 52, 53, 54, 55;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 48;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 49;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 50;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 51;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 52;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 53;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 54;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "dataout[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 55;
	TREE_LEVEL = 1;
	PARENT = 47;
}

DISPLAY_LINE
{
	CHANNEL = "adclk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 56;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "wr_ram";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 57;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "rd_ram";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 58;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 20850;
	MASTER = TRUE;
}
;
上一页 12
💿 文件大小 381 K
👤 上传用户 lyyfengyutongzh
📂 所属分类其他
🏷️ 相关标签

#FPGA #有限状态机 #数据采集系统
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