ssc.asm

Synchronous Serial Communications (SSC) is a synchronous serial communications protocol between

;----------------------------------------------------------------------
;
;   Filename:           ssc.asm
;   Microcontroller:    
;   Assembled using:    MPLAB IDE v6.40
;
;   Author:             Steven Bible
;   Company:            Microchip Technology Inc.
;
;
;----------------------------------------------------------------------
;
;   Program Description:
;
;   Synchronous Serial Communications (SSC) is a synchronous serial
;   communications protocol between a target PICmicro microcontroller
;   unit and the PICkit 1 or 2.
;
;----------------------------------------------------------------------
;
;   Revision History:
;
;   Ver. 0.0 - February 7, 2004: Initial write
;   Ver. 0.1 - November 18, 2005: Added SSC_Init
;
;----------------------------------------------------------------------

    errorlevel  -302                ; suppress message 302 from list file

;----------------------------------------------------------------------
; Include Files and Project Files:
;----------------------------------------------------------------------

#include    "main.inc"              ; Project defines

;----------------------------------------------------------------------
; Global Defines
;----------------------------------------------------------------------

    ; Place the following #define directives in the main.inc file

    ; may be any I/O pin that has interrupt-on-change capability

;#define SSCDAT      PORTA, 0
;#define SSCCLK      PORTA, 1

    ; choose one

;#define CLOCKSPEED      .20000000	; 20 MHz Osc
;#define CLOCKSPEED      .8000000	; 8 MHz Osc
;#define CLOCKSPEED      .4000000	; 4 MHz Osc

;----------------------------------------------------------------------
; Local Defines
;----------------------------------------------------------------------

    ; None

;----------------------------------------------------------------------
; Variables
;----------------------------------------------------------------------

;--------------------
; Uninitialized Data Section
;
; The RES directive should be used to reserve space for data storage.

    ;udata


;--------------------
; Shared Uninitialized Data Section
;
; Variables that are allocated in RAM that are shared across all RAM banks (unbanked RAM). 
; The RES directive should be used to reserve space for data storage.
;
    udata_shr

TxByte              res 1
BitCounter          res 1
DelayCounter        res 1
SSC_RxByte          res 1


;--------------------
; Global Variables
;
; Variables defined in this module that should be available to other
; modules. The <label> must be defined prior to using the GLOBAL directive. 

    global  SSC_RxByte


;----------------------------------------------------------------------
; Begin Executable Code Segment
;----------------------------------------------------------------------

;[<label>]  code    [<ROM_Address>]

            code

;----------------------------------------------------------------------
; Subroutine: Initialize SSC 
;   
; Description: 
;              
; Constants: 
;   
; Global Variables: 
;   
; Initialization: 
;   
; Output: 
;   
;----------------------------------------------------------------------

SSC_Init
    global  SSC_Init

;----------------------------------------
; PORTA Weak Pull-up Register (WPUA) (Section 4.2.1)
;
; Each of the PORTA pins, except RA3, has an individually configurable
; weak internal pull-up. Control bits WPUAx enable or disable each 
; pull-up. Refer to Register 4-3. Each weak pull-up is automatically
; turned off when the port pin is configured as an output. The pull-ups
; are disabled on a Power-on Reset by the /RAPU bit (see OPTION Register
; below).

        banksel WPUA                ; Bank 1

;    PORTA Pins = xx54x210
        movlw   B'00000010'         ; RA1 pull-up ENABLED
        movwf   WPUA

;----------------------------------------
; PORTA Interrupt-on-Change Register (IOCA) (Section 4.2.2)
;
; Each of the PORTA pins is individually configurable as an interrupt-
; on-change pin. Control bits IOCAx enable or disable the interrupt 
; function for each pin. Refer to Register 4-4. The interrupt-on-change
; is disabled on a Power-on Reset.
;
; Note: Global, port change, and peripheral interrupt enables 
;       (GIE, RAIE and PEIE) must be enabled for individual interrupts
;       to be recognized (see INTCON register below).

        banksel IOCA                ; Bank 1

;    PORTA Pins = xx54x210
        movlw   B'00000010'         ; RA1 interrupt-on-change ENABLED
        movwf   IOCA

;----------------------------------------
; OPTION Register (OPTION_REG) (Section 2.2.2.2)
; TIMER0 Module (Section 4)
;
; The OPTION_REG contains control bits to configure:
;   Weak pull-ups on PORTA (see also WPUA Register above)
;   External RA2/INT interrupt
;   TMR0
;   TMR0/WDT prescaler

        banksel OPTION_REG          ; Bank 1

        bcf     OPTION_REG, NOT_RABPU ; PORTA/PORTB pull-ups: ENABLED

;----------------------------------------

        banksel PORTA
        movfw   PORTA               ; clear any interrupt on change conditions
        bcf     INTCON, RABIF

        bsf     INTCON, RABIE       ; PORTA/PORTB Change Interrupt: ENABLED


        return


;----------------------------------------------------------------------
; Subroutine: SSC Get Byte
;   
; Description: Reads a byte from the SSC I/O pins. The target PICmicro
;              will be slave (
;              Returns byte in the W register.
; Constants: 
;   
; Global Variables: 
;   
; Initialization: 
;   
; Output: 
;   
;----------------------------------------------------------------------

SSC_GetByte
        global  SSC_GetByte

        clrf    SSC_RxByte          ; clear the received byte variable

        movlw   .8                  ; load bit counter with 8
        movwf   BitCounter

        btfsc   SSCCLK              ; Is the clock low?
        goto    $-1                 ;   no, keep waiting

GBLoop
        btfss   SSCCLK              ; Is the clock high?
        goto    $-1                 ;   yes, go read the incoming byte

        bcf     STATUS, C           ; clear carry now to save the cycle after falling edge

        btfsc   SSCCLK              ; waiting for low, is it?
        goto    $-1

        btfsc   SSCDAT              ; We've already assumed the bit is a 0 is it?
        bsf     STATUS, C           ; no, set carry
        rrf     SSC_RxByte, F       ; rotate carry into byte

        decfsz  BitCounter, F       ; has the entire byte been sent?
         goto   GBLoop              ; no, loop

        movfw   SSC_RxByte          ; return received byte in W register

        return


;----------------------------------------------------------------------
; Subroutine: SSC Send Byte
;   
; Description: Sends a byte in Synchronous Master Mode.  
;              Master reads it on the falling edge.
; Constants: 
;   
; Global Variables: 
;   
; Initialization: 
;   
; Output: 
;   
;----------------------------------------------------------------------

SSC_SendByte
        global  SSC_SendByte

        movwf   TxByte              ; save byte to send

        bsf     SSCCLK              ; set CLK high

        bsf	    STATUS, RP0         ; ---- Select Bank 1 -----

        bcf     SSCCLK              ; set TRIS bit to output
        bcf     SSCDAT              ; set TRIS bit to output

        bcf     STATUS, RP0         ; ---- Select Bank 0 -----

        movlw   .8                  ; load bit counter with 8
        movwf   BitCounter

SCBSLoop
        bsf     SSCCLK              ; set CLK high

        call    HalfBitTimeDelay

        btfsc   TxByte, 0           ; is bit 0 high?
         bsf    SSCDAT              ;   yes, set Data pin high

        btfss   TxByte, 0           ;   no, set Data pin low
         bcf    SSCDAT

        rrf     TxByte, F

        call    HalfBitTimeDelay

        bcf     SSCCLK              ; set CLK low

        call    BitTimeDelay

        decfsz  BitCounter, F       ; has the entire byte been sent?
         goto   SCBSLoop            ; no, loop
			
;EndSCBS
        call    BitTimeDelay        ; add in extra delay after

        bcf     SSCCLK              ; set CLK low
        bcf     SSCDAT              ; set Data pin low

        bsf     STATUS, RP0         ; ---- Select Bank 1 -----

        bsf     SSCCLK              ; set TRIS bit to input
        bsf     SSCDAT              ; set TRIS bit to input

        bcf     STATUS, RP0         ; ---- Select Bank 0 -----

        return


;----------------------------------------------------------------------

HalfBitTimeDelay

        if CLOCKSPEED == .4000000
            movlw	.4	;  4 Mhz delay
        else
            if CLOCKSPEED == .8000000
                movlw	.8	;  8 Mhz delay
            else
                if CLOCKSPEED == .20000000
                    movlw	.6	; 20 Mhz delay
                else 
                    messg "HalfBitTime delay not configured for clockspeed"
                endif
            endif
        endif

        goto	TimeDelay

BitTimeDelay

        if CLOCKSPEED == .4000000
            movlw   .7                      ; 4 Mhz delay
        else
            if CLOCKSPEED == .8000000
                movlw   .16                 ; 8 Mhz delay
            else
                if CLOCKSPEED == .20000000
                    movlw   .12             ; 20 Mhz delay
                else 
                    messg "HalfBitTime delay not configured for clockspeed"
                endif
            endif
        endif

TimeDelay

        movwf   DelayCounter
        decfsz  DelayCounter, F
         goto   $-1

        return


;----------------------------------------------------------------------
        end                         ; end of program directive
;----------------------------------------------------------------------