📄 getpower_m8.lst
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00D7 E604 LDI R16,0x64
00D8 E010 LDI R17,0
00D9 DFBB RCALL _ms
00DA 5F4F SUBI R20,0xFF
00DB 4F5F SBCI R21,0xFF
00DC E00A LDI R16,0xA
00DD E010 LDI R17,0
00DE 019B MOVW R18,R22
00DF D093 RCALL empy16s
00E0 1740 CP R20,R16
00E1 0751 CPC R21,R17
00E2 F3A0 BCS 0x00D7
00E3 D09F RCALL pop_gset2
00E4 9508 RET
(0120) }
(0121)
(0122)
(0123) /////////////////////////////////////////////////////////////////////////////////
(0124) // ADC 初始化
(0125) void adc_init(void)
(0126) {
(0127) adc_first =1;
_adc_init:
00E5 E081 LDI R24,1
00E6 E090 LDI R25,0
00E7 93900063 STS adc_first+1,R25
00E9 93800062 STS adc_first,R24
(0128) adc_val = 0;
00EB 2422 CLR R2
00EC 2433 CLR R3
00ED 92300067 STS adc_val+1,R3
00EF 92200066 STS adc_val,R2
(0129)
(0130) DDRC&=0xFE;//设PC0口为高阻输入
00F1 B384 IN R24,0x14
00F2 7F8E ANDI R24,0xFE
00F3 BB84 OUT 0x14,R24
(0131) PORTC&=0xFE;
00F4 B385 IN R24,0x15
00F5 7F8E ANDI R24,0xFE
00F6 BB85 OUT 0x15,R24
(0132) // ADMUX=0x00;//选择外部2.47V为基准,ADC0通道
(0133) // ACSR =(1<<ACD);//关闭模拟比较器
(0134) // SFIOR&=(~(1<<ADHSM)); //低速AD模式
(0135) //64分频单次转换模式并开始第一次转换
(0136) ADCSRA|=(1<<ADEN)|(1<<ADIE)|(1<<ADIE)|(1<<ADPS2)|(1<<ADPS1);
00F7 B186 IN R24,0x06
00F8 688E ORI R24,0x8E
00F9 B986 OUT 0x06,R24
00FA 9508 RET
_adc_isr:
00FB D0AA RCALL push_lset
(0137)
(0138) }
(0139)
(0140) /////////////////////////////////////////////////////////////////////////////////
(0141) //ADC完成中断
(0142) #pragma interrupt_handler adc_isr:iv_ADC
(0143) void adc_isr(void)
(0144) {
(0145) WDR();
00FC 95A8 WDR
(0146)
(0147) if ( adc_first ){adc_first--;
00FD 90200062 LDS R2,adc_first
00FF 90300063 LDS R3,adc_first+1
0101 2022 TST R2
0102 F411 BNE 0x0105
0103 2033 TST R3
0104 F051 BEQ 0x010F
0105 91800062 LDS R24,adc_first
0107 91900063 LDS R25,adc_first+1
0109 9701 SBIW R24,1
010A 93900063 STS adc_first+1,R25
010C 93800062 STS adc_first,R24
(0148) }else{adc_val = ADC & 0x3ff; //取AD值
010E C01C RJMP 0x012B
010F B184 IN R24,0x04
0110 B195 IN R25,0x05
0111 7093 ANDI R25,3
0112 93900067 STS adc_val+1,R25
0114 93800066 STS adc_val,R24
(0149) if(adc_val==0x3ff){
0116 91800066 LDS R24,adc_val
0118 91900067 LDS R25,adc_val+1
011A 3F8F CPI R24,0xFF
011B E0E3 LDI R30,3
011C 079E CPC R25,R30
011D F469 BNE 0x012B
(0150) Power_Low=0;
011E 2422 CLR R2
011F 2433 CLR R3
0120 92300065 STS Power_Low+1,R3
0122 92200064 STS Power_Low,R2
(0151) DDRB|=(1<<PB1);
0124 9AB9 SBI 0x17,1
(0152) PORTB|=(1<<PB1);
0125 9AC1 SBI 0x18,1
(0153) ms(500);
0126 EF04 LDI R16,0xF4
0127 E011 LDI R17,1
0128 DF6C RCALL _ms
(0154) PORTB&=(~(1<<PB1));
0129 98C1 CBI 0x18,1
(0155) DDRB&=(~(1<<PB1));
012A 98B9 CBI 0x17,1
(0156) }
(0157)
(0158) }
012B D091 RCALL pop_lset
012C 9518 RETI
(0159) }
(0160) /////////////////////////////////////////////////////////////////////////////////
(0161) //比较器 初始化
(0162) void AC_init(void)
(0163) {
(0164) DDRD&=0x3F;//设PD6,PD7口为高阻输入
_AC_init:
012D B381 IN R24,0x11
012E 738F ANDI R24,0x3F
012F BB81 OUT 0x11,R24
(0165) PORTD&=0X3F;
0130 B382 IN R24,0x12
0131 738F ANDI R24,0x3F
0132 BB82 OUT 0x12,R24
(0166) ACSR|=(1<<ACIE)|(1<<ACIS1)|(1<<ACIS0);//比较器中断允许，输出上升沿触发
0133 B188 IN R24,0x08
0134 608B ORI R24,0xB
0135 B988 OUT 0x08,R24
0136 9508 RET
_ac_isr:
0137 D06E RCALL push_lset
(0167) }
(0168)
(0169) /////////////////////////////////////////////////////////////////////////////////
(0170) //比较器中断处理
(0171) #pragma interrupt_handler ac_isr:iv_ANA_COMP
(0172) void ac_isr(void)
(0173) {
(0174) Power_Low=1;
0138 E081 LDI R24,1
0139 E090 LDI R25,0
013A 93900065 STS Power_Low+1,R25
013C 93800064 STS Power_Low,R24
(0175) DDRB|=(1<<PB2);
013E 9ABA SBI 0x17,2
(0176) PORTB|=(1<<PB2);
013F 9AC2 SBI 0x18,2
(0177) ms(500);
0140 EF04 LDI R16,0xF4
0141 E011 LDI R17,1
0142 DF52 RCALL _ms
(0178) PORTB&=(~(1<<PB2));
0143 98C2 CBI 0x18,2
(0179) DDRB&=(~(1<<PB2));
0144 98BA CBI 0x17,2
0145 D077 RCALL pop_lset
0146 9518 RETI
(0180)
(0181) }
(0182) /////////////////////////////////////////////////////////////////////////////////
(0183) void wdt_init(void)
(0184) {
(0185) WDR();//喂狗
_wdt_init:
0147 95A8 WDR
(0186) WDTCR|=(BIT(WDCE)|BIT(WDE));
0148 B581 IN R24,0x21
0149 6188 ORI R24,0x18
014A BD81 OUT 0x21,R24
(0187) WDTCR=BIT(WDP2)|BIT(WDP1)|BIT(WDP0)|BIT(WDE);
014B E08F LDI R24,0xF
014C BD81 OUT 0x21,R24
014D 9508 RET
(0188) }
(0189)
(0190)
(0191) /////////////////////////////////////////////////////////////
(0192)
(0193) void main(void)
(0194) {
(0195) CLI();
_main:
014E 94F8 BCLR 7
(0196) wdt_init();
014F DFF7 RCALL _wdt_init
(0197) adc_init();
0150 DF94 RCALL _adc_init
(0198) AC_init();
0151 DFDB RCALL _AC_init
(0199) WDR();
0152 95A8 WDR
(0200) DDRD|=(1<<PD3);//Led指示
0153 9A8B SBI 0x11,3
(0201) SEI();
0154 9478 BSET 7
(0202) ac_isr();
0155 DFE1 RCALL _ac_isr
(0203) Power_Low=1;
0156 E081 LDI R24,1
0157 E090 LDI R25,0
0158 93900065 STS Power_Low+1,R25
015A 93800064 STS Power_Low,R24
015C C014 RJMP 0x0171
(0204) while(1){
(0205) WDR();
015D 95A8 WDR
(0206) LED_H;
015E 9A93 SBI 0x12,3
(0207) ms(3000);
015F EB08 LDI R16,0xB8
0160 E01B LDI R17,0xB
0161 DF33 RCALL _ms
(0208) if(!Power_Low){NOP();}else{ADCSRA|=(1<<ADSC);}
0162 90200064 LDS R2,Power_Low
0164 90300065 LDS R3,Power_Low+1
0166 2022 TST R2
0167 F421 BNE 0x016C
0168 2033 TST R3
0169 F411 BNE 0x016C
016A 0000 NOP
016B C001 RJMP 0x016D
016C 9A36 SBI 0x06,6
(0209) LED_L;
016D 9893 CBI 0x12,3
(0210) ms(3000);
FILE: <library>
016E EB08 LDI R16,0xB8
016F E01B LDI R17,0xB
0170 DF24 RCALL _ms
0171 CFEB RJMP 0x015D
0172 9508 RET
empy16s:
0173 920A ST R0,-Y
0174 921A ST R1,-Y
0175 938A ST R24,-Y
0176 939A ST R25,-Y
0177 9F02 MUL R16,R18
0178 01C0 MOVW R24,R0
0179 9F12 MUL R17,R18
017A 0D90 ADD R25,R0
017B 9F03 MUL R16,R19
017C 0D90 ADD R25,R0
017D 018C MOVW R16,R24
017E 9199 LD R25,Y+
017F 9189 LD R24,Y+
0180 9019 LD R1,Y+
0181 9009 LD R0,Y+
0182 9508 RET
pop_gset2:
0183 E0E2 LDI R30,2
0184 C00E RJMP pop
pop_gset4:
0185 E0E8 LDI R30,0x8
0186 C00C RJMP pop
push_gset5:
0187 92FA ST R15,-Y
0188 92EA ST R14,-Y
push_gset4:
0189 92DA ST R13,-Y
018A 92CA ST R12,-Y
push_gset3:
018B 92BA ST R11,-Y
018C 92AA ST R10,-Y
push_gset2:
018D 937A ST R23,-Y
018E 936A ST R22,-Y
push_gset1:
018F 935A ST R21,-Y
0190 934A ST R20,-Y
0191 9508 RET
pop_gset1:
0192 E0E1 LDI R30,1
pop:
0193 9149 LD R20,Y+
0194 9159 LD R21,Y+
0195 FDE0 SBRC R30,0
0196 9508 RET
0197 9169 LD R22,Y+
0198 9179 LD R23,Y+
0199 FDE1 SBRC R30,1
019A 9508 RET
019B 90A9 LD R10,Y+
019C 90B9 LD R11,Y+
019D FDE2 SBRC R30,2
019E 9508 RET
019F 90C9 LD R12,Y+
01A0 90D9 LD R13,Y+
01A1 FDE3 SBRC R30,3
01A2 9508 RET
01A3 90E9 LD R14,Y+
01A4 90F9 LD R15,Y+
01A5 9508 RET
push_lset:
01A6 93FA ST R31,-Y
01A7 93EA ST R30,-Y
01A8 93BA ST R27,-Y
01A9 93AA ST R26,-Y
01AA 939A ST R25,-Y
01AB 938A ST R24,-Y
01AC 933A ST R19,-Y
01AD 932A ST R18,-Y
01AE 931A ST R17,-Y
01AF 930A ST R16,-Y
01B0 929A ST R9,-Y
01B1 928A ST R8,-Y
01B2 927A ST R7,-Y
01B3 926A ST R6,-Y
01B4 925A ST R5,-Y
01B5 924A ST R4,-Y
01B6 923A ST R3,-Y
01B7 922A ST R2,-Y
01B8 921A ST R1,-Y
01B9 920A ST R0,-Y
01BA B60F IN R0,0x3F
01BB 920A ST R0,-Y
01BC 9508 RET
pop_lset:
01BD 9009 LD R0,Y+
01BE BE0F OUT 0x3F,R0
01BF 9009 LD R0,Y+
01C0 9019 LD R1,Y+
01C1 9029 LD R2,Y+
01C2 9039 LD R3,Y+
01C3 9049 LD R4,Y+
01C4 9059 LD R5,Y+
01C5 9069 LD R6,Y+
01C6 9079 LD R7,Y+
01C7 9089 LD R8,Y+
01C8 9099 LD R9,Y+
01C9 9109 LD R16,Y+
01CA 9119 LD R17,Y+
01CB 9129 LD R18,Y+
01CC 9139 LD R19,Y+
01CD 9189 LD R24,Y+
01CE 9199 LD R25,Y+
01CF 91A9 LD R26,Y+
01D0 91B9 LD R27,Y+
01D1 91E9 LD R30,Y+
01D2 91F9 LD R31,Y+
01D3 9508 RET
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