📄 nrf905_jinju.s
字号:
.dbline 318
; }
;
; /////////////////////////////////////////////////////////////////////////////////
; void put_bytes(BYTE *buf,int len)
; {
.dbline 320
; int i;
; for ( i=0; i<len; i++ ) uart_TxChar(buf[i]);
clr R20
clr R21
rjmp L76
L73:
.dbline 320
movw R30,R20
add R30,R12
adc R31,R13
ldd R16,z+0
rcall _uart_TxChar
L74:
.dbline 320
subi R20,255 ; offset = 1
sbci R21,255
L76:
.dbline 320
cp R20,R10
cpc R21,R11
brlt L73
X16:
.dbline -2
L72:
.dbline 0 ; func end
rjmp pop_xgset303C
.dbsym r i 20 I
.dbsym r len 10 I
.dbsym r buf 12 pc
.dbend
.dbfunc e GetLPC _GetLPC fc
; c -> R20
; i -> R22,R23
; len -> R18,R19
; buf -> R16,R17
.even
_GetLPC::
rcall push_xgsetF000
.dbline -1
.dbline 325
; }
;
; /////////////////////////////////////////////////////////////////////////////////
; BYTE GetLPC(BYTE *buf,short len)
; {
.dbline 327
; short i;
; BYTE c = 0xff;
ldi R20,255
.dbline 329
;
; for ( i=0; i<len; i++ ) c ^= buf[i];
clr R22
clr R23
rjmp L81
L78:
.dbline 329
movw R30,R22
add R30,R16
adc R31,R17
ldd R2,z+0
eor R20,R2
L79:
.dbline 329
subi R22,255 ; offset = 1
sbci R23,255
L81:
.dbline 329
cp R22,R18
cpc R23,R19
brlt L78
X17:
.dbline 330
; return c;
mov R16,R20
.dbline -2
L77:
.dbline 0 ; func end
rjmp pop_xgsetF000
.dbsym r c 20 c
.dbsym r i 22 S
.dbsym r len 18 S
.dbsym r buf 16 pc
.dbend
.dbfunc e SPI_MasterInit _SPI_MasterInit fV
; temp -> R16
.even
_SPI_MasterInit::
.dbline -1
.dbline 335
; }
;
; /////////////////////////////////////////////////////////////
; void SPI_MasterInit(void)
; {
.dbline 339
; BYTE temp;
;
; // PD7(LED)PD6(TRX_CE),PD5(TX_EN) PD2(CD),PD3(DR),PD4(AM)
; PORTD = 0x1C;
ldi R24,28
out 0x12,R24
.dbline 340
; DDRD = 0x80|0x40|0x20;
ldi R24,224
out 0x11,R24
.dbline 341
; TX_EN_L;
cbi 0x12,5
.dbline 342
; TRX_CE_L;
cbi 0x12,6
.dbline 343
; LED_L;
cbi 0x12,7
.dbline 346
; // Set MOSI, SCK, SS, POWER_UP output,all others input
; // PB3 PB5 PB2 PB0
; CLI();
cli
.dbline 347
; DDRB = 0x08 |0x20| 0x04|0x01;
ldi R24,45
out 0x17,R24
.dbline 348
; MISO_H;
sbi 0x18,4
.dbline 349
; CSN_H;
sbi 0x18,2
.dbline 353
; // Enable SPI,Master,Set clock rate fck/16,interrupt enable
; // SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPIE)|(1<<CPHA);
; // SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPIE);
; SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
ldi R24,81
out 0xd,R24
.dbline 355
; // SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<CPHA);
; SPSR = 0x00;
clr R2
out 0xe,R2
.dbline 356
; temp = SPSR;
in R16,0xe
.dbline 357
; temp = SPCR;
in R16,0xd
.dbline 358
; SEI();
sei
.dbline -2
L82:
.dbline 0 ; func end
ret
.dbsym r temp 16 c
.dbend
.dbfunc e SPI_Char _SPI_Char fV
; c -> R18
; rxflag -> R16
.even
_SPI_Char::
.dbline -1
.dbline 363
; }
;
; /////////////////////////////////////////////////////////////
; void SPI_Char(BYTE rxflag,char c)
; {
.dbline 364
; SPDR = c;
out 0xf,R18
L84:
.dbline 365
; while(!(SPSR & (1<<SPIF)));
L85:
.dbline 365
sbis 0xe,7
rjmp L84
X18:
.dbline 367
;
; if ( rxflag ) {
tst R16
breq L87
X19:
.dbline 367
.dbline 368
; spi_rxbuf[spi_rxpt] = SPDR;
ldi R24,<_spi_rxbuf
ldi R25,>_spi_rxbuf
lds R30,_spi_rxpt
clr R31
add R30,R24
adc R31,R25
in R2,0xf
std z+0,R2
.dbline 369
; spi_rxpt = (spi_rxpt+1)&SPI_BUF_LEN1;
lds R24,_spi_rxpt
subi R24,255 ; addi 1
andi R24,15
sts _spi_rxpt,R24
.dbline 370
; }
L87:
.dbline -2
L83:
.dbline 0 ; func end
ret
.dbsym r c 18 c
.dbsym r rxflag 16 c
.dbend
.dbfunc e nrF905_PowerOff_Mode _nrF905_PowerOff_Mode fV
.even
_nrF905_PowerOff_Mode::
.dbline -1
.dbline 375
; }
;
; /////////////////////////////////////////////////////////////
; void nrF905_PowerOff_Mode()
; {
.dbline 376
; PWR_UP_L;
cbi 0x18,0
.dbline -2
L89:
.dbline 0 ; func end
ret
.dbend
.dbfunc e nrF905_Standby_Mode _nrF905_Standby_Mode fV
.even
_nrF905_Standby_Mode::
.dbline -1
.dbline 381
; }
;
; /////////////////////////////////////////////////////////////
; void nrF905_Standby_Mode()
; {
.dbline 382
; PWR_UP_H;
sbi 0x18,0
.dbline 383
; TRX_CE_L;
cbi 0x12,6
.dbline -2
L90:
.dbline 0 ; func end
ret
.dbend
.dbfunc e nrF905_TX_Mode _nrF905_TX_Mode fV
.even
_nrF905_TX_Mode::
.dbline -1
.dbline 388
; }
;
; /////////////////////////////////////////////////////////////
; void nrF905_TX_Mode()
; {
.dbline 389
; PWR_UP_H;
sbi 0x18,0
.dbline 390
; TX_EN_H;
sbi 0x12,5
.dbline 391
; TRX_CE_L;
cbi 0x12,6
.dbline -2
L91:
.dbline 0 ; func end
ret
.dbend
.dbfunc e nrF905_RX_Mode _nrF905_RX_Mode fV
.even
_nrF905_RX_Mode::
.dbline -1
.dbline 396
; }
;
; /////////////////////////////////////////////////////////////
; void nrF905_RX_Mode()
; {
.dbline 397
; PWR_UP_H;
sbi 0x18,0
.dbline 398
; TX_EN_L;
cbi 0x12,5
.dbline 399
; TRX_CE_H;
sbi 0x12,6
.dbline 400
; us(650);
ldi R16,650
ldi R17,2
rcall _us
.dbline -2
L92:
.dbline 0 ; func end
ret
.dbend
.dbfunc e spi_handle _spi_handle fc
; len -> R22
; i -> R20
; cmd -> R10
.even
_spi_handle::
rcall push_xgsetF00C
mov R10,R16
.dbline -1
.dbline 405
; }
;
; /////////////////////////////////////////////////////////////
; BYTE spi_handle(BYTE cmd)
; {
.dbline 407
; BYTE len,i;
; switch(cmd) {
mov R20,R10
clr R21
cpi R20,16
ldi R30,0
cpc R21,R30
breq L97
X20:
cpi R20,16
ldi R30,0
cpc R21,R30
brge X31
rjmp L94
X31:
X21:
L122:
cpi R20,33
ldi R30,0
cpc R21,R30
brne X32
rjmp L114
X32:
X22:
cpi R20,35
ldi R30,0
cpc R21,R30
breq L106
X23:
cpi R20,36
ldi R30,0
cpc R21,R30
breq L104
X24:
rjmp L94
L97:
.dbline 409
; case R_CONFIG:
; len = 10;
ldi R22,10
.dbline 410
; for ( i=0; i<10; i++ ) {
clr R20
rjmp L101
L98:
.dbline 410
.dbline 411
; if ( Register[i] != spi_rxbuf[i] ) return 1;
ldi R24,<_spi_rxbuf
ldi R25,>_spi_rxbuf
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
ldi R24,<_Register
ldi R25,>_Register
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R3,z+0
cp R3,R2
breq L102
X25:
.dbline 411
ldi R16,1
rjmp L93
L102:
.dbline 412
; }
L99:
.dbline 410
inc R20
L101:
.dbline 410
cpi R20,10
brlo L98
X26:
.dbline 413
; break;
rjmp L95
L104:
.dbline 415
; case R_RX_PAYLOAD:
; len = Register[3] & 0x3f;
lds R22,_Register+3
andi R22,63
.dbline 419
; // uart_TxChar(len);
; // rxpt = 0;
; // handlept = 0;
; FlashFlag = FLASHLIMIT;
ldi R24,2
sts _FlashFlag,R24
.dbline 426
; /* for ( i=0; i<len; i++ ) {
; uart_TxChar(spi_rxbuf[i]);
; }
; */
; // rxpt = len;
;
; handle();
rcall _handle
.dbline 427
; NoDataCount = 0;
clr R2
clr R3
sts _NoDataCount+1,R3
sts _NoDataCount,R2
.dbline 428
; break;
rjmp L95
L106:
.dbline 430
; case R_TX_ADDRESS:
; len = (Register[2] >> 4) & 0x07;
lds R22,_Register+2
swap R22
andi R22,#0x0F
andi R22,7
.dbline 431
; for ( i=0; i<len; i++ ) {
clr R20
rjmp L111
L108:
.dbline 431
.dbline 432
; if ( tx_addr[i] != spi_rxbuf[i] ) return 1;
ldi R24,<_spi_rxbuf
ldi R25,>_spi_rxbuf
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
ldi R24,<_tx_addr
ldi R25,>_tx_addr
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R3,z+0
cp R3,R2
breq L112
X27:
.dbline 432
ldi R16,1
rjmp L93
L112:
.dbline 433
; }
L109:
.dbline 431
inc R20
L111:
.dbline 431
cp R20,R22
brlo L108
X28:
.dbline 435
;
; break;
rjmp L95
L114:
.dbline 437
; case R_TX_PAYLOAD:
; len = Register[4] & 0x3F;
lds R22,_Register+4
andi R22,63
.dbline 438
; for ( i=0; i<len; i++ ) {
clr R20
rjmp L119
L116:
.dbline 438
.dbline 439
; if ( tx_buf[i] != spi_rxbuf[i] ) return 1;
ldi R24,<_spi_rxbuf
ldi R25,>_spi_rxbuf
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
ldi R24,<_tx_buf
ldi R25,>_tx_buf
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R3,z+0
cp R3,R2
breq L120
X29:
.dbline 439
ldi R16,1
rjmp L93
L120:
.dbline 440
; }
L117:
.dbline 438
inc R20
L119:
.dbline 438
cp R20,R22
brlo L116
X30:
.dbline 442
;
; break;
L94:
L95:
.dbline 445
; }
;
; nrF905_RX_Mode();
rcall _nrF905_RX_Mode
.dbline 446
; return 0;
clr R16
.dbline -2
L93:
.dbline 0 ; func end
rjmp pop_xgsetF00C
.dbsym r len 22 c
.dbsym r i 20 c
.dbsym r cmd 10 c
.dbend
.dbfunc e SPI_R_CONFIG _SPI_R_CONFIG fc
; i -> R20
.even
_SPI_R_CONFIG::
st -y,R20
.dbline -1
.dbline 451
; }
;
; /////////////////////////////////////////////////////////////
; BYTE SPI_R_CONFIG()
; {
.dbline 454
; BYTE i;
;
; spi_rxpt = 0;
clr R2
sts _spi_rxpt,R2
.dbline 455
; spi_handlept = 0;
sts _spi_handlept,R2
.dbline 456
; nrF905_Standby_Mode();
rcall _nrF905_Standby_Mode
.dbline 457
; CSN_L;
cbi 0x18,2
.dbline 458
; SPI_Char(0,R_CONFIG);
ldi R18,16
clr R16
rcall _SPI_Char
.dbline 459
; for ( i=0; i<10; i++ ) SPI_Char(1,0xff);
clr R20
rjmp L127
L124:
.dbline 459
ldi R18,255
ldi R16,1
rcall _SPI_Char
L125:
.dbline 459
inc R20
L127:
.dbline 459
cpi R20,10
brlo L124
X33:
.dbline 461
;
; CSN_H;
sbi 0x18,2
.dbline 462
; return spi_handle(R_CONFIG);
ldi R16,16
rcall _spi_handle
.dbline -2
L123:
.dbline 0 ; func end
ld R20,y+
ret
.dbsym r i 20 c
.dbend
.dbfunc e SPI_W_CONFIG _SPI_W_CONFIG fV
; i -> R20
.even
_SPI_W_CONFIG::
st -y,R20
.dbline -1
.dbline 467
; }
;
; /////////////////////////////////////////////////////////////
; void SPI_W_CONFIG()
; {
.dbline 470
; BYTE i;
;
; nrF905_Standby_Mode();
rcall _nrF905_Standby_Mode
.dbline 471
; ms(10);
ldi R16,10
ldi R17,0
rcall _ms
rjmp L130
L129:
.dbline 472
; while(1) {
.dbline 473
; CSN_L;
cbi 0x18,2
.dbline 474
; SPI_Char(0,W_CONFIG);
clr R18
clr R16
rcall _SPI_Char
.dbline 475
; for ( i=0; i<10; i++ ) {
clr R20
rjmp L135
L132:
.dbline 475
.dbline 476
; SPI_Char(0,Register[i]);
ldi R24,<_Register
ldi R25,>_Register
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R18,z+0
clr R16
rcall _SPI_Char
.dbline 477
; }
L133:
.dbline 475
inc R20
L135:
.dbline 475
cpi R20,10
brlo L132
X34:
.dbline 479
;
; CSN_H;
sbi 0x18,2
.dbline 481
;
; if ( !SPI_R_CONFIG() ) break;
rcall _SPI_R_CONFIG
tst R16
brne L136
X35:
.dbline 481
rjmp L131
L136:
.dbline 482
; }
L130:
.dbline 472
rjmp L129
L131:
.dbline 484
;
; nrF905_RX_Mode();
rcall _nrF905_RX_Mode
.dbline -2
L128:
.dbline 0 ; func end
ld R20,y+
ret
.dbsym r i 20 c
.dbend
.dbfunc e SPI_R_TX_PAYLOAD _SPI_R_TX_PAYLOAD fc
; len -> R20
; i -> R10
.even
_SPI_R_TX_PAYLOAD::
st -y,R10
st -y,R20
.dbline -1
.dbline 489
; }
;
; /////////////////////////////////////////////////////////////
; BYTE SPI_R_TX_PAYLOAD()
; {
.dbline 492
; BYTE i,len;
;
; spi_rxpt = 0;
clr R2
sts _spi_rxpt,R2
.dbline 493
; spi_handlept = 0;
sts _spi_handlept,R2
.dbline 494
; nrF905_Standby_Mode();
rcall _nrF905_Standby_Mode
.dbline 495
; CSN_L;
cbi 0x18,2
.dbline 496
; SPI_Char(0,R_TX_PAYLOAD);
ldi R18,33
clr R16
rcall _SPI_Char
.dbline 497
; len = Register[4] & 0x3F;
lds R20,_Register+4
andi R20,63
.dbline 498
; for ( i=0; i<len; i++ ) SPI_Char(1,0xff);
clr R10
rjmp L143
L140:
.dbline 498
ldi R18,255
ldi R16,1
rcall _SPI_Char
L141:
.dbline 498
inc R10
L143:
.dbline 498
cp R10,R20
brlo L140
X36:
.dbline 500
;
; CSN_H;
sbi 0x18,2
.dbline 501
; return spi_handle(R_TX_PAYLOAD);
ldi R16,33
rcall _spi_handle
.dbline -2
L138:
.dbline 0 ; func end
ld R20,y+
ld R10,y+
ret
.dbsym r len 20 c
.dbsym r i 10 c
.dbend
.dbfunc e SPI_W_TX_PAYLOAD _SPI_W_TX_PAYLOAD fV
; len -> R20
; i -> R20
.even
_SPI_W_TX_PAYLOAD::
st -y,R20
.dbline -1
.dbline 506
; }
;
; /////////////////////////////////////////////////////////////
; void SPI_W_TX_PAYLOAD()
; {
.dbline 509
; BYTE i,len;
;
; CSN_L;
cbi 0x18,2
.dbline 510
; SPI_Char(0,W_TX_PAYLOAD);
ldi R18,32
clr R16
rcall _SPI_Char
.dbline 512
;
; len = Register[4] & 0x3F;
lds R20,_Register+4
andi R20,63
.dbline 513
; for ( i=0; i<16; i++ ) {
clr R20
rjmp L149
L146:
.dbline 513
.dbline 514
; SPI_Char(0,tx_buf[i]);
ldi R24,<_tx_buf
ldi R25,>_tx_buf
mov R30,R20
clr R31
add R30,R24
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