lesson7.lst

这个是AVR关中定时器与中断方面的程序

__text_start:
__start:
    003B E5CF      LDI	R28,0x5F
    003C E0D4      LDI	R29,4
    003D BFCD      OUT	0x3D,R28
    003E BFDE      OUT	0x3E,R29
    003F 51C0      SUBI	R28,0x10
    0040 40D0      SBCI	R29,0
    0041 EA0A      LDI	R16,0xAA
    0042 8308      STD	Y+0,R16
    0043 2400      CLR	R0
    0044 E6E1      LDI	R30,0x61
    0045 E0F0      LDI	R31,0
    0046 E010      LDI	R17,0
    0047 36E1      CPI	R30,0x61
    0048 07F1      CPC	R31,R17
    0049 F011      BEQ	0x004C
    004A 9201      ST	R0,Z+
    004B CFFB      RJMP	0x0047
    004C 8300      STD	Z+0,R16
    004D E7E4      LDI	R30,0x74
    004E E0F0      LDI	R31,0
    004F E6A0      LDI	R26,0x60
    0050 E0B0      LDI	R27,0
    0051 E010      LDI	R17,0
    0052 37E5      CPI	R30,0x75
    0053 07F1      CPC	R31,R17
    0054 F021      BEQ	0x0059
    0055 95C8      LPM
    0056 9631      ADIW	R30,1
    0057 920D      ST	R0,X+
    0058 CFF9      RJMP	0x0052
    0059 940E00B1  CALL	_main
_exit:
    005B CFFF      RJMP	_exit
_delay:
  i                    --> R20
  j                    --> R22
  ms                   --> R16
    005C 940E00F2  CALL	push_gset2
FILE: I:\学习\单片机编程\AVR\十天学~1\第七集\lesson7\chengxu\MIAO\lesson7.c
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003) #define  uchar unsigned char
(0004) #define  uint  unsigned int
(0005) uchar num=0;
(0006) #pragma interrupt_handler miao:9
(0007) #pragma data:code 
(0008) const  table[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d, 0x07,
(0009) 		           0x7f,0x6f,0x77,0x7c,0x39,0x5e,0x79,0x71};
(0010) 
(0011) void delay(uint ms)
(0012) {
(0013)         uint i,j;
(0014) 	for(i=0;i<ms;i++)
    005E 2744      CLR	R20
    005F 2755      CLR	R21
    0060 C00B      RJMP	0x006C
(0015) 	   {
(0016) 	   for(j=0;j<1141;j++);
    0061 2766      CLR	R22
    0062 2777      CLR	R23
    0063 C002      RJMP	0x0066
    0064 5F6F      SUBI	R22,0xFF
    0065 4F7F      SBCI	R23,0xFF
    0066 3765      CPI	R22,0x75
    0067 E0E4      LDI	R30,4
    0068 077E      CPC	R23,R30
    0069 F3D0      BCS	0x0064
    006A 5F4F      SUBI	R20,0xFF
    006B 4F5F      SBCI	R21,0xFF
    006C 1740      CP	R20,R16
    006D 0751      CPC	R21,R17
    006E F390      BCS	0x0061
    006F 940E00E9  CALL	pop_gset2
    0071 9508      RET
_show:
  k                    --> R20
  j                    --> R22
    0072 940E00F2  CALL	push_gset2
    0074 2F42      MOV	R20,R18
    0075 2F60      MOV	R22,R16
(0017)        }
(0018) }
(0019) void show(uchar j,uchar k)
(0020) {
(0021)         PORTA|=BIT(3);
    0076 9ADB      SBI	0x1B,3
(0022) 	PORTB=table[j];
    0077 E082      LDI	R24,2
    0078 9F86      MUL	R24,R22
    0079 01F0      MOVW	R30,R0
    007A E584      LDI	R24,0x54
    007B E090      LDI	R25,0
    007C 0FE8      ADD	R30,R24
    007D 1FF9      ADC	R31,R25
    007E 9005      LPM	R0,Z+
    007F 9014      LPM	R1,0(Z)
    0080 01F0      MOVW	R30,R0
    0081 BBE8      OUT	0x18,R30
(0023) 	PORTA&=~BIT(3);
    0082 98DB      CBI	0x1B,3
(0024) 	
(0025) 	PORTB=0XFF;
    0083 EF8F      LDI	R24,0xFF
    0084 BB88      OUT	0x18,R24
(0026) 	PORTB&=~BIT(k);
    0085 E001      LDI	R16,1
    0086 2F14      MOV	R17,R20
    0087 940E010B  CALL	lsl8
    0089 2E20      MOV	R2,R16
    008A 9420      COM	R2
    008B B238      IN	R3,0x18
    008C 2032      AND	R3,R2
    008D BA38      OUT	0x18,R3
(0027) 	PORTA|=BIT(4);
    008E 9ADC      SBI	0x1B,4
(0028) 	PORTA&=~BIT(4);
    008F 98DC      CBI	0x1B,4
(0029) 	delay(1);
    0090 E001      LDI	R16,1
    0091 E010      LDI	R17,0
    0092 DFC9      RCALL	_delay
    0093 940E00E9  CALL	pop_gset2
    0095 9508      RET
_miao:
    0096 922A      ST	R2,-Y
    0097 938A      ST	R24,-Y
    0098 939A      ST	R25,-Y
    0099 B62F      IN	R2,0x3F
    009A 922A      ST	R2,-Y
(0030) }
(0031) void miao()
(0032) {
(0033)     if(num==60)
    009B 91800060  LDS	R24,num
    009D 338C      CPI	R24,0x3C
    009E F419      BNE	0x00A2
(0034) 	   num=0;
    009F 2422      CLR	R2
    00A0 92200060  STS	num,R2
(0035) 	 num++;
    00A2 91800060  LDS	R24,num
    00A4 5F8F      SUBI	R24,0xFF
    00A5 93800060  STS	num,R24
(0036) 	TCNT1H=0X85;
    00A7 E885      LDI	R24,0x85
    00A8 BD8D      OUT	0x2D,R24
(0037) 	TCNT1L=0XED;  
    00A9 EE8D      LDI	R24,0xED
    00AA BD8C      OUT	0x2C,R24
    00AB 9029      LD	R2,Y+
    00AC BE2F      OUT	0x3F,R2
    00AD 9199      LD	R25,Y+
    00AE 9189      LD	R24,Y+
    00AF 9029      LD	R2,Y+
    00B0 9518      RETI
(0038) }
(0039) void main()
(0040) {
(0041)     DDRB=0XFF;
_main:
    00B1 EF8F      LDI	R24,0xFF
    00B2 BB87      OUT	0x17,R24
(0042) 	DDRA|=0X18;
    00B3 B38A      IN	R24,0x1A
    00B4 6188      ORI	R24,0x18
    00B5 BB8A      OUT	0x1A,R24
(0043) 	
(0044) 	TCCR1B=0X04;
    00B6 E084      LDI	R24,4
    00B7 BD8E      OUT	0x2E,R24
(0045) 	TCNT1H=0X85;
    00B8 E885      LDI	R24,0x85
    00B9 BD8D      OUT	0x2D,R24
(0046) 	TCNT1L=0XED;
    00BA EE8D      LDI	R24,0xED
    00BB BD8C      OUT	0x2C,R24
(0047) 	TIMSK|=BIT(2);
    00BC B789      IN	R24,0x39
    00BD 6084      ORI	R24,4
    00BE BF89      OUT	0x39,R24
(0048) 	SREG|=BIT(7);
    00BF 9478      BSET	7
    00C0 C00E      RJMP	0x00CF
(0049) 	
(0050) 	while(1)
(0051) 	{
(0052) 	    show(num/10,0);
    00C1 2722      CLR	R18
    00C2 E01A      LDI	R17,0xA
    00C3 91000060  LDS	R16,num
    00C5 940E00D3  CALL	div8u
    00C7 DFAA      RCALL	_show
(0053) 		show(num%10,1);
FILE: <library>
    00C8 E021      LDI	R18,1
    00C9 E01A      LDI	R17,0xA
    00CA 91000060  LDS	R16,num
    00CC 940E00D1  CALL	mod8u
    00CE DFA3      RCALL	_show
    00CF CFF1      RJMP	0x00C1
    00D0 9508      RET
mod8u:
    00D1 9468      BSET	6
    00D2 C001      RJMP	xdiv8u
div8u:
    00D3 94E8      BCLR	6
xdiv8u:
    00D4 932A      ST	R18,-Y
    00D5 92FA      ST	R15,-Y
    00D6 92EA      ST	R14,-Y
    00D7 24FF      CLR	R15
    00D8 24EE      CLR	R14
    00D9 E120      LDI	R18,0x10
    00DA 0F00      LSL	R16
    00DB 1CFF      ROL	R15
    00DC 1CEE      ROL	R14
    00DD 16E1      CP	R14,R17
    00DE F010      BCS	0x00E1
    00DF 1AE1      SUB	R14,R17
    00E0 9503      INC	R16
    00E1 952A      DEC	R18
    00E2 F7B9      BNE	0x00DA
    00E3 F40E      BRTC	0x00E5
    00E4 2D0E      MOV	R16,R14
    00E5 90E9      LD	R14,Y+
    00E6 90F9      LD	R15,Y+
    00E7 9129      LD	R18,Y+
    00E8 9508      RET
pop_gset2:
    00E9 E0E2      LDI	R30,2
    00EA 940C00F8  JMP	pop
push_gset5:
    00EC 92FA      ST	R15,-Y
    00ED 92EA      ST	R14,-Y
push_gset4:
    00EE 92DA      ST	R13,-Y
    00EF 92CA      ST	R12,-Y
push_gset3:
    00F0 92BA      ST	R11,-Y
    00F1 92AA      ST	R10,-Y
push_gset2:
    00F2 937A      ST	R23,-Y
    00F3 936A      ST	R22,-Y
push_gset1:
    00F4 935A      ST	R21,-Y
    00F5 934A      ST	R20,-Y
    00F6 9508      RET
pop_gset1:
    00F7 E0E1      LDI	R30,1
pop:
    00F8 9149      LD	R20,Y+
    00F9 9159      LD	R21,Y+
    00FA FDE0      SBRC	R30,0
    00FB 9508      RET
    00FC 9169      LD	R22,Y+
    00FD 9179      LD	R23,Y+
    00FE FDE1      SBRC	R30,1
    00FF 9508      RET
    0100 90A9      LD	R10,Y+
    0101 90B9      LD	R11,Y+
    0102 FDE2      SBRC	R30,2
    0103 9508      RET
    0104 90C9      LD	R12,Y+
    0105 90D9      LD	R13,Y+
    0106 FDE3      SBRC	R30,3
    0107 9508      RET
    0108 90E9      LD	R14,Y+
    0109 90F9      LD	R15,Y+
    010A 9508      RET
lsl8:
    010B 2311      TST	R17
    010C F019      BEQ	0x0110
    010D 0F00      LSL	R16
    010E 951A      DEC	R17
    010F CFFB      RJMP	lsl8
    0110 9508      RET