s1d13806.c

AT91RM9200 BSP with dual ethernet port

	s1d13806_base->S1D13806_OnChipReg.OCR_LCDPP = ( char ) 0x00 ;		/* LCD Pixel Panning */

	s1d13806_base->S1D13806_OnChipReg.OCR_LCDDFHTC = ( char ) 0x3B ;	/* LCD Display FIFO High Treshold CR */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDDFLTC = ( char ) 0x3C ;	/* LCD Display FIFO Low Treshold CR */

	/** Program the CRT/TV timing control registers*/
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTHDW = ( char ) ( ( s1d13806_display_desc.DisplayDefDesc->hdw/8 ) - 1 ) ;	/* CRT/TV Horizontal Display Width */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTHNDP = ( char ) s1d13806_display_desc.RegDesc->crthndp ;	/* CRT/TV Horizontal Non-Display Period */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTHSP = ( char ) s1d13806_display_desc.RegDesc->crthsp ;	/* CRT/TV HRTC Start Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTHPW = ( char ) s1d13806_display_desc.RegDesc->crthpw ;	/* CRT/TV HRTC Pulse Width */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTVDH = ( short ) ( s1d13806_display_desc.DisplayDefDesc->vdw - 1 ) ;	/* CRT/TV Vertical Display Height */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTVNDP = ( char ) s1d13806_display_desc.RegDesc->crtvndp ;	/* CRT/TV Vertical Non-Display Period */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTVSP = ( char ) s1d13806_display_desc.RegDesc->crtvsp ;	/* CRT/TV VRTC Start Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTVPW = ( char ) s1d13806_display_desc.RegDesc->crtvpw ;	/* CRT/TV VRTC Pulse Width */
	s1d13806_base->S1D13806_OnChipReg.OCR_TVOC = ( char ) s1d13806_display_desc.RegDesc->tvoc ;	/* TV Output CR */

	/** Program the LCD display output format, memory start locations and FIFO values*/
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDM = ( char ) s1d13806_display_desc.RegDesc->crtdm ;	/* CRT/TV Display Mode */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 = ( char ) 0x00 ;	/* CRT/TV Display Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 = ( char ) 0x00 ;	/* CRT/TV Display Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 = ( char ) 0x00 ;	/* CRT/TV Display Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTMAO = ( short ) s1d13806_display_desc.RegDesc->crtmao ;	/* CRT/TV Memory Address Offset */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTPP = ( char ) 0x00 ;		/* CRT/TV Pixel Panning */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDFHTC = ( char ) 0x3B ;	/* CRT/TV Display FIFO High Treshold CR */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDFLTC = ( char ) 0x3C ;	/* CRT/TV Display FIFO Low Treshold CR */

	/** Program the LCD Ink Layer/HW Cursor, Position, Color, and FIFO registers*/
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICC = ( char ) s1d13806_display_desc.RegDesc->lcdicc ;	/* LCD Ink/Cursor */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICBA = ( char ) s1d13806_display_desc.RegDesc->lcdicba ;	/* LCD Ink/Cursor Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDCXP = ( short ) 0x0000 ;	/* LCD Cursor X Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDCYP = ( short ) 0x0000 ;	/* LCD Cursor Y Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICB_0 = ( char ) s1d13806_display_desc.RegDesc->lcdicb0 ;	/* LCD Ink/Cursor Blue Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICG_0 = ( char ) s1d13806_display_desc.RegDesc->lcdicg0 ;	/* LCD Ink/Cursor Green Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICR_0 = ( char ) s1d13806_display_desc.RegDesc->lcdicr0 ;	/* LCD Ink/Cursor Red Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICB_1 = ( char ) s1d13806_display_desc.RegDesc->lcdicb1 ;	/* LCD Ink/Cursor Blue Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICG_1 = ( char ) s1d13806_display_desc.RegDesc->lcdicg1 ;	/* LCD Ink/Cursor Green Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICR_1 = ( char ) s1d13806_display_desc.RegDesc->lcdicr1 ;	/* LCD Ink/Cursor Red Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDICFT = ( char ) 0x00 ;	/* LCD Ink/Cursor FIFO High Treshold */

	/** Program the CRT/TV Ink Layer/HW Cursor, Position, Color, and FIFO registers*/
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICC = ( char ) s1d13806_display_desc.RegDesc->crticc ;	/* CRT/TV Ink/Cursor CR */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICBA = ( char ) s1d13806_display_desc.RegDesc->crticba ;	/* CRT/TV Ink/Cursor Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTCXP = ( short ) 0x0000 ;	/* CRT/TV Cursor X Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTCYP = ( short ) 0x0000 ;	/* CRT/TV Cursor Y Position */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICB_0 = ( char ) s1d13806_display_desc.RegDesc->crticb0 ;	/* CRT/TV Ink/Cursor Blue Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICG_0 = ( char ) s1d13806_display_desc.RegDesc->crticg0 ;	/* CRT/TV Ink/Cursor Green Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICR_0 = ( char ) s1d13806_display_desc.RegDesc->crticr0 ;	/* CRT/TV Ink/Cursor Red Color 0 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICB_1 = ( char ) s1d13806_display_desc.RegDesc->crticb1 ;	/* CRT/TV Ink/Cursor Blue Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICG_1 = ( char ) s1d13806_display_desc.RegDesc->crticg1 ;	/* CRT/TV Ink/Cursor Green Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICR_1 = ( char ) s1d13806_display_desc.RegDesc->crticr1 ;	/* CRT/TV Ink/Cursor Red Color 1 */
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTICFT = ( char ) 0x00 ;	/* CRT/TV Ink/Cursor FIFO High Treshold */

	/** Set the 2D acceleration (BitBLT) registers to a known state*/
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTC = ( short ) 0x0000 ;	/* BitBLT CR */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTRCCE = ( char ) 0x00 ;	/* BitBLT ROP Code/Color Expansion */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTO = ( char ) 0x00 ;		/* BitBLT Operation */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTSSA_0 = ( char ) 0x00 ;	/* BitBLT Source Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTSSA_1 = ( char ) 0x00 ;	/* BitBLT Source Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTSSA_2 = ( char ) 0x00 ;	/* BitBLT Source Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTDSA_0 = ( char ) 0x00 ;	/* BitBLT Destination Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTDSA_1 = ( char ) 0x00 ;	/* BitBLT Destination Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTDSA_2 = ( char ) 0x00 ;	/* BitBLT Destination Start Address */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTMAO = ( short ) 0x0000 ;/* BitBLT Memory Address Offset */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTW = ( short ) 0x0000 ;	/* BitBLT Width */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTH = ( short ) 0x0000 ;	/* BitBLT Height */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTBC = ( short ) 0x0000 ;	/* BitBLT Background Color */
	s1d13806_base->S1D13806_OnChipReg.OCR_BBLTFC = ( short ) 0x0000 ;	/* BitBLT Foreground Color */

	/** Program the look-up table to a known state*/
	s1d13806_base->S1D13806_OnChipReg.OCR_LUTM = ( char ) s1d13806_display_desc.RegDesc->lutm ;	/* Look-Up Table Mode */

	s1d13806_base->S1D13806_OnChipReg.OCR_LUTBA = ( char ) 0x00 ;		/* Look-Up Table Address */

	/** Turn off power save mode*/
	s1d13806_base->S1D13806_OnChipReg.OCR_PSC = ( char ) s1d13806_display_desc.RegDesc->psc ;	/* Power Save Configuration */

	/** Disable the watchdog timer*/
	s1d13806_base->S1D13806_OnChipReg.OCR_WDT = ( char ) 0x00 ;		/* CPU to Memory Access Watchdog Timer */

	/** Enable the display*/
	s1d13806_base->S1D13806_OnChipReg.OCR_DM = ( char ) s1d13806_display_desc.RegDesc->dm ;	/* Display Mode */

	/** Clear display memory by filling 1.25 MB Display Memory with 0*/
/*	for ( i = 0 ; i < ( int ) ( S1D13806_DISP_MEM_SIZE ) ; i++ )
	{
		*display_mem = 0x00 ;
		display_mem++ ;
	}*/
}

/**----------------------------------------------------------------------------*/
/** \fn    AT91F_S1D13806_16bpp_print_string*/
/** \brief Send a string to Video Graphic Controller*/
/**----------------------------------------------------------------------------*/
void AT91F_S1D13806_16bpp_print_string ( AT91PS_S1D13806_Desc s1d13806_base, char *buff )
{
    int   i, j, k ;
    int   hdw, vdw, hnbp, vnbp, nb_char ;
    int   disp_mem_base, lcd_start_address, crt_start_address ;
    char  *display_mem ;
    char  *disp_src , *disp_dest ;

    hdw = ( int ) s1d13806_display_desc.DisplayDefDesc->hdw ;
    vdw = ( int ) s1d13806_display_desc.DisplayDefDesc->vdw ;
    hnbp = s1d13806_display_desc.CharDefDesc->hnbp ;
    vnbp = s1d13806_display_desc.CharDefDesc->vnbp ;
    disp_mem_base = s1d13806_display_desc.s1d13806_disp_mem_base_add ;
    nb_char = s1d13806_display_desc.DataDesc->Present_nb_char_on_line ;
    display_mem = s1d13806_display_desc.DataDesc->Present_display_mem_ptr ;
    lcd_start_address = s1d13806_display_desc.DataDesc->Present_lcd_start_address ;
    crt_start_address = s1d13806_display_desc.DataDesc->Present_crt_start_address ;

	s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_2 = ( char ) ( lcd_start_address >> 16 ) ;
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_1 = ( char ) ( lcd_start_address >> 8 ) ;
	s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_0 = ( char ) lcd_start_address ;
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 = ( char ) ( crt_start_address >> 16 ) ;
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 = ( char ) ( crt_start_address >> 8 ) ;
	s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 = ( char ) crt_start_address ;

    for ( i = 0 ; buff[i] != 0 ; i++ )
    {
		switch ( buff[i] )
		{
			case '\n' :
				display_mem = ( char * ) ( (int ) display_mem + ( int ) ( hdw * 2 * vnbp ) ) ;
				display_mem = ( char * ) ( ( int ) display_mem + hnbp ) ;
				nb_char++ ;
				break ;
			case '\r' :
				display_mem = ( char * ) ( ( ( ( ( ( int ) display_mem - disp_mem_base ) )
										/( ( int ) ( hdw * 2 ) )  ) * ( ( int ) ( hdw * 2 ) ) )
										+ ( ( int ) ( disp_mem_base ) ) ) ;
				nb_char = 0 ;
				break ;
			case '\t' :
				display_mem = ( char * ) ( ( int ) display_mem + ( int ) ( 4 * hnbp * 2 ) ) ;
				nb_char += 4 ;
				break ;
			default :
				for ( j = 0 ; j < vnbp ; j++ )
				{
					for ( k = 0 ; k < ( int ) 8 ; k++, display_mem++ )
					{
						if ( ( ( ( s1d13806_CharSet16[ ( ( int ) ( ( ( ( int ) buff[i] ) * vnbp ) + j ) ) ] ) << k ) & 0x80 ) )
							*display_mem = 0xFF ;
						else
							*display_mem = 0x00 ;
					}
					display_mem = ( char * ) ( ( int ) display_mem - hnbp ) ;
					display_mem = ( char * ) ( ( int ) display_mem + ( int ) ( hdw * 2 ) ) ;
				}
				display_mem = ( char * ) ( ( int ) display_mem + hnbp ) ;
				display_mem = ( char * ) ( ( int ) display_mem - ( int ) ( hdw * 2 * vnbp ) ) ;
				nb_char++ ;
				break ;
		}
		if ( ( nb_char * hnbp ) >= ( ( int ) ( hdw * 2 ) ) )
		{
			display_mem = ( char * ) ( ( int ) display_mem + ( int ) ( hdw * 2 * ( vnbp - 1 ) ) ) ;
			nb_char = 0 ;
		}
		if ( ( ( int ) display_mem - disp_mem_base )  >= ( ( int ) ( hdw * vdw * 2 ) ) )
		{
			if ( ( ( int ) display_mem - disp_mem_base )  >= ( ( int ) ( hdw * vdw * 4 ) ) )
			{
				disp_dest = ( char * ) disp_mem_base ;
				disp_src = ( char * ) ( ( ( int ) disp_dest ) + ( ( int ) ( hdw * vdw * 2 ) ) ) ;
				for ( j = 0 ; j < ( ( int ) ( hdw * vdw * 2 ) ) ; j++, disp_dest++, disp_src++ )
					*disp_dest = *disp_src ;
				display_mem = ( char * ) ( ( int ) display_mem - ( int ) ( hdw * vdw * 2 ) ) ;
				lcd_start_address = ( int ) ( ( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_2 ) << 16 ) |
											( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_1 ) << 8 ) |
											( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_0 ) ) ;
				crt_start_address = ( int ) ( ( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 ) << 16 ) |
											( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 ) << 8 ) |
											( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 ) ) ;
				lcd_start_address -= ( int ) ( hdw * vdw ) ;
				crt_start_address -= ( int ) ( hdw * vdw ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_2 = ( char ) ( lcd_start_address >> 16 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_1 = ( char ) ( lcd_start_address >> 8 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_0 = ( char ) lcd_start_address ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 = ( char ) ( crt_start_address >> 16 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 = ( char ) ( crt_start_address >> 8 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 = ( char ) crt_start_address ;
			}
			if ( nb_char == 0 )
			{
				disp_src = ( char * ) display_mem ;
				/** Clear following line of display memory by filling with 0*/
				for ( j = 0 ; j < ( int ) ( hdw * 2 * vnbp ) ; j++ )
				{
					*disp_src = 0x00 ;
					disp_src++ ;
				}
				lcd_start_address = ( int ) ( ( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_2 ) << 16 ) |
											( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_1 ) << 8 ) |
											( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_0 ) ) ;
				crt_start_address = ( int ) ( ( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 ) << 16 ) |
											( ( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 ) << 8 ) |
											( ( int ) s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 ) ) ;
				lcd_start_address += ( int ) ( hdw * vnbp ) ;
				crt_start_address += ( int ) ( hdw * vnbp ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_2 = ( char ) ( lcd_start_address >> 16 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_1 = ( char ) ( lcd_start_address >> 8 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_LCDDBA_0 = ( char ) lcd_start_address ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_2 = ( char ) ( crt_start_address >> 16 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_1 = ( char ) ( crt_start_address >> 8 ) ;
				s1d13806_base->S1D13806_OnChipReg.OCR_CRTDBA_0 = ( char ) crt_start_address ;
			}
		}
	}
    s1d13806_display_desc.DataDesc->Present_nb_char_on_line = nb_char ;
    s1d13806_display_desc.DataDesc->Present_display_mem_ptr = display_mem ;
    s1d13806_display_desc.DataDesc->Present_lcd_start_address = lcd_start_address ;
    s1d13806_display_desc.DataDesc->Present_crt_start_address = crt_start_address ;
}