📄 saa7134-reg.h
字号:
/* * philips saa7134 registers *//* ------------------------------------------------------------------ *//* * PCI ID's */#ifndef PCI_DEVICE_ID_PHILIPS_SAA7130# define PCI_DEVICE_ID_PHILIPS_SAA7130 0x7130#endif#ifndef PCI_DEVICE_ID_PHILIPS_SAA7133# define PCI_DEVICE_ID_PHILIPS_SAA7133 0x7133#endif#ifndef PCI_DEVICE_ID_PHILIPS_SAA7134# define PCI_DEVICE_ID_PHILIPS_SAA7134 0x7134#endif#ifndef PCI_DEVICE_ID_PHILIPS_SAA7135# define PCI_DEVICE_ID_PHILIPS_SAA7135 0x7135#endif/* ------------------------------------------------------------------ *//* * registers -- 32 bit *//* DMA channels, n = 0 ... 6 */#define SAA7134_RS_BA1(n) ((0x200 >> 2) + 4*n)#define SAA7134_RS_BA2(n) ((0x204 >> 2) + 4*n)#define SAA7134_RS_PITCH(n) ((0x208 >> 2) + 4*n)#define SAA7134_RS_CONTROL(n) ((0x20c >> 2) + 4*n)#define SAA7134_RS_CONTROL_WSWAP (0x01 << 25)#define SAA7134_RS_CONTROL_BSWAP (0x01 << 24)#define SAA7134_RS_CONTROL_BURST_2 (0x01 << 21)#define SAA7134_RS_CONTROL_BURST_4 (0x02 << 21)#define SAA7134_RS_CONTROL_BURST_8 (0x03 << 21)#define SAA7134_RS_CONTROL_BURST_16 (0x04 << 21)#define SAA7134_RS_CONTROL_BURST_32 (0x05 << 21)#define SAA7134_RS_CONTROL_BURST_64 (0x06 << 21)#define SAA7134_RS_CONTROL_BURST_MAX (0x07 << 21)#define SAA7134_RS_CONTROL_ME (0x01 << 20)#define SAA7134_FIFO_SIZE (0x2a0 >> 2)#define SAA7134_THRESHOULD (0x2a4 >> 2)/* main control */#define SAA7134_MAIN_CTRL (0x2a8 >> 2)#define SAA7134_MAIN_CTRL_VPLLE (1 << 15)#define SAA7134_MAIN_CTRL_APLLE (1 << 14)#define SAA7134_MAIN_CTRL_EXOSC (1 << 13)#define SAA7134_MAIN_CTRL_EVFE1 (1 << 12)#define SAA7134_MAIN_CTRL_EVFE2 (1 << 11)#define SAA7134_MAIN_CTRL_ESFE (1 << 10)#define SAA7134_MAIN_CTRL_EBADC (1 << 9)#define SAA7134_MAIN_CTRL_EBDAC (1 << 8)#define SAA7134_MAIN_CTRL_TE6 (1 << 6)#define SAA7134_MAIN_CTRL_TE5 (1 << 5)#define SAA7134_MAIN_CTRL_TE4 (1 << 4)#define SAA7134_MAIN_CTRL_TE3 (1 << 3)#define SAA7134_MAIN_CTRL_TE2 (1 << 2)#define SAA7134_MAIN_CTRL_TE1 (1 << 1)#define SAA7134_MAIN_CTRL_TE0 (1 << 0)/* DMA status */#define SAA7134_DMA_STATUS (0x2ac >> 2)/* audio / video status */#define SAA7134_AV_STATUS (0x2c0 >> 2)#define SAA7134_AV_STATUS_STEREO (1 << 17)#define SAA7134_AV_STATUS_DUAL (1 << 16)#define SAA7134_AV_STATUS_PILOT (1 << 15)#define SAA7134_AV_STATUS_SMB (1 << 14)#define SAA7134_AV_STATUS_DMB (1 << 13)#define SAA7134_AV_STATUS_VDSP (1 << 12)#define SAA7134_AV_STATUS_IIC_STATUS (3 << 10)#define SAA7134_AV_STATUS_MVM (7 << 7)#define SAA7134_AV_STATUS_FIDT (1 << 6)#define SAA7134_AV_STATUS_INTL (1 << 5)#define SAA7134_AV_STATUS_RDCAP (1 << 4)#define SAA7134_AV_STATUS_PWR_ON (1 << 3)#define SAA7134_AV_STATUS_LOAD_ERR (1 << 2)#define SAA7134_AV_STATUS_TRIG_ERR (1 << 1)#define SAA7134_AV_STATUS_CONF_ERR (1 << 0)/* interrupt */#define SAA7134_IRQ1 (0x2c4 >> 2)#define SAA7134_IRQ1_INTE_RA3_1 (1 << 25)#define SAA7134_IRQ1_INTE_RA3_0 (1 << 24)#define SAA7134_IRQ1_INTE_RA2_3 (1 << 19)#define SAA7134_IRQ1_INTE_RA2_2 (1 << 18)#define SAA7134_IRQ1_INTE_RA2_1 (1 << 17)#define SAA7134_IRQ1_INTE_RA2_0 (1 << 16)#define SAA7134_IRQ1_INTE_RA1_3 (1 << 11)#define SAA7134_IRQ1_INTE_RA1_2 (1 << 10)#define SAA7134_IRQ1_INTE_RA1_1 (1 << 9)#define SAA7134_IRQ1_INTE_RA1_0 (1 << 8)#define SAA7134_IRQ1_INTE_RA0_7 (1 << 7)#define SAA7134_IRQ1_INTE_RA0_6 (1 << 6)#define SAA7134_IRQ1_INTE_RA0_5 (1 << 5)#define SAA7134_IRQ1_INTE_RA0_4 (1 << 4)#define SAA7134_IRQ1_INTE_RA0_3 (1 << 3)#define SAA7134_IRQ1_INTE_RA0_2 (1 << 2)#define SAA7134_IRQ1_INTE_RA0_1 (1 << 1)#define SAA7134_IRQ1_INTE_RA0_0 (1 << 0)#define SAA7134_IRQ2 (0x2c8 >> 2)#define SAA7134_IRQ2_INTE_GPIO23A (1 << 17)#define SAA7134_IRQ2_INTE_GPIO23 (1 << 16)#define SAA7134_IRQ2_INTE_GPIO22A (1 << 15)#define SAA7134_IRQ2_INTE_GPIO22 (1 << 14)#define SAA7134_IRQ2_INTE_GPIO18A (1 << 13)#define SAA7134_IRQ2_INTE_GPIO18 (1 << 12)#define SAA7134_IRQ2_INTE_GPIO16 (1 << 11) /* not certain */#define SAA7134_IRQ2_INTE_SC2 (1 << 10)#define SAA7134_IRQ2_INTE_SC1 (1 << 9)#define SAA7134_IRQ2_INTE_SC0 (1 << 8)#define SAA7134_IRQ2_INTE_DEC5 (1 << 7)#define SAA7134_IRQ2_INTE_DEC4 (1 << 6)#define SAA7134_IRQ2_INTE_DEC3 (1 << 5)#define SAA7134_IRQ2_INTE_DEC2 (1 << 4)#define SAA7134_IRQ2_INTE_DEC1 (1 << 3)#define SAA7134_IRQ2_INTE_DEC0 (1 << 2)#define SAA7134_IRQ2_INTE_PE (1 << 1)#define SAA7134_IRQ2_INTE_AR (1 << 0)#define SAA7134_IRQ_REPORT (0x2cc >> 2)#define SAA7134_IRQ_REPORT_GPIO23 (1 << 17)#define SAA7134_IRQ_REPORT_GPIO22 (1 << 16)#define SAA7134_IRQ_REPORT_GPIO18 (1 << 15)#define SAA7134_IRQ_REPORT_GPIO16 (1 << 14) /* not certain */#define SAA7134_IRQ_REPORT_LOAD_ERR (1 << 13)#define SAA7134_IRQ_REPORT_CONF_ERR (1 << 12)#define SAA7134_IRQ_REPORT_TRIG_ERR (1 << 11)#define SAA7134_IRQ_REPORT_MMC (1 << 10)#define SAA7134_IRQ_REPORT_FIDT (1 << 9)#define SAA7134_IRQ_REPORT_INTL (1 << 8)#define SAA7134_IRQ_REPORT_RDCAP (1 << 7)#define SAA7134_IRQ_REPORT_PWR_ON (1 << 6)#define SAA7134_IRQ_REPORT_PE (1 << 5)#define SAA7134_IRQ_REPORT_AR (1 << 4)#define SAA7134_IRQ_REPORT_DONE_RA3 (1 << 3)#define SAA7134_IRQ_REPORT_DONE_RA2 (1 << 2)#define SAA7134_IRQ_REPORT_DONE_RA1 (1 << 1)#define SAA7134_IRQ_REPORT_DONE_RA0 (1 << 0)#define SAA7134_IRQ_STATUS (0x2d0 >> 2)/* ------------------------------------------------------------------ *//* * registers -- 8 bit *//* video decoder */#define SAA7134_INCR_DELAY 0x101#define SAA7134_ANALOG_IN_CTRL1 0x102#define SAA7134_ANALOG_IN_CTRL2 0x103#define SAA7134_ANALOG_IN_CTRL3 0x104#define SAA7134_ANALOG_IN_CTRL4 0x105#define SAA7134_HSYNC_START 0x106#define SAA7134_HSYNC_STOP 0x107#define SAA7134_SYNC_CTRL 0x108#define SAA7134_LUMA_CTRL 0x109#define SAA7134_DEC_LUMA_BRIGHT 0x10a#define SAA7134_DEC_LUMA_CONTRAST 0x10b#define SAA7134_DEC_CHROMA_SATURATION 0x10c#define SAA7134_DEC_CHROMA_HUE 0x10d#define SAA7134_CHROMA_CTRL1 0x10e#define SAA7134_CHROMA_GAIN 0x10f#define SAA7134_CHROMA_CTRL2 0x110#define SAA7134_MODE_DELAY_CTRL 0x111#define SAA7134_ANALOG_ADC 0x114#define SAA7134_VGATE_START 0x115#define SAA7134_VGATE_STOP 0x116#define SAA7134_MISC_VGATE_MSB 0x117#define SAA7134_RAW_DATA_GAIN 0x118#define SAA7134_RAW_DATA_OFFSET 0x119#define SAA7134_STATUS_VIDEO1 0x11e#define SAA7134_STATUS_VIDEO2 0x11f/* video scaler */#define SAA7134_SOURCE_TIMING1 0x000#define SAA7134_SOURCE_TIMING2 0x001#define SAA7134_REGION_ENABLE 0x004
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -