dmaregs.inc

基于TMS320C5509A的音频收发回放程序,汇编语言

DMA_GCR 	.SET 0x0E00 ;DMA Global Control Register xxxx xxxx xxxx x000
DMA_GTCR	.SET 0x0E03 ;DMA Timeout Control Register
*****CHANNEL #0 REGISTERS
DMA_CSDP0 	.SET 0x0C00 ;DMA Channel 0 Source Destination Parameters Register 0000 0000 0000 0000
DMA_CCR0  	.SET 0x0C01 ;DMA Channel 0 Control Register 0000 0000 0000 0000
DMA_CICR0 	.SET 0x0C02 ;DMA Channel 0 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR0  	.SET 0x0C03 ;DMA Channel 0 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L0 .SET 0x0C04 ;DMA Channel 0 Source Start Address Register lower
DMA_CSSA_U0 .SET 0x0C05 ;DMA Channel 0 Source Start Address Register uper
DMA_CDSA_L0 .SET 0x0C06 ;DMA Channel 0 Destination Start Address Register(lower bits)
DMA_CDSA_U0 .SET 0x0C07 ;DMA Channel 0 Destination Start Address Register(upper bits)
DMA_CEN0 	.SET 0x0C08 ;DMA Channel 0 Element Number Register Undefined
DMA_CFN0 	.SET 0x0C09 ;DMA Channel 0 Frame Number Register Undefined
DMA_CFI0 	.SET 0x0C0A ;DMA Channel 0 Frame Index Register Undefined
DMA_CEI0 	.SET 0x0C0B ;DMA Channel 0 Element Index Register Undefined
****CHANNEL #1 REGISTERS
DMA_CSDP1 	.SET 0x0C20 ;DMA Channel 1 Source DestinationParameters Register0000 0000 0000 0000
DMA_CCR1 	.SET 0x0C21 ;DMA Channel 1 Control Register 0000 0000 0000 0000
DMA_CICR1   .SET 0x0C22 ;DMA Channel 1 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR1 	.SET 0x0C23 ; DMA Channel 1 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L1 .SET 0x0C24 ;DMA Channel 1 Source Start Address Register(lower bits)
DMA_CSSA_U1 .SET 0x0C25 ;DMA Channel 1 Source Start Address Register(upper bits)
DMA_CDSA_L1 .SET 0x0C26 ;DMA Channel 1 Destination Start Address Register(lower bits)
DMA_CDSA_U1 .SET 0x0C27 ;DMA Channel 1 Destination Start Address Register(upper bits)
DMA_CEN1  	.SET 0x0C28 ;DMA Channel 1 Element Number Register Undefined
DMA_CFN1 	.SET 0x0C29 ;DMA Channel 1 Frame Number Register Undefined
DMA_CFI1 	.SET 0x0C2A ;DMA Channel 1 Frame Index Register Undefined
DMA_CEI1 	.SET 0x0C2B ;DMA Channel 1 Element Index Register Undefined
**********CHANNEL #2 REGISTERS
DMA_CSDP2 	.SET 0x0C40 ;DMA Channel 2 Source Destination Parameters Register0000 0000 0000 0000
DMA_CCR2  	.SET 0x0C41 ;DMA Channel 2 Control Register 0000 0000 0000 0000
DMA_CICR2 	.SET 0x0C42 ;DMA Channel 2 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR2  	.SET 0x0C43 ; DMA Channel 2 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L2 .SET 0x0C44 ;DMA Channel 2 Source Start Address Register(lower bits)
DMA_CSSA_U2 .SET 0x0C45 ;DMA Channel 2 Source Start Address Register(upper bits)
DMA_CDSA_L2 .SET 0x0C46 ;DMA Channel 2 Destination Start Address Register(lower bits)
DMA_CDSA_U2 .SET 0x0C47 ;DMA Channel 2 Destination Start Address Register(upper bits)
DMA_CEN2  	.SET 0x0C48 ;DMA Channel 2 Element Number Register Undefined
DMA_CFN2  	.SET 0x0C49 ;DMA Channel 2 Frame Number Register Undefined
DMA_CFI2 	.SET 0x0C4A ;DMA Channel 2 Frame Index Register Undefined
DMA_CEI2 	.SET 0x0C4B ;DMA Channel 2 Element Index Register Undefined
************CHANNEL #3 REGISTERS
DMA_CSDP3 	.SET 0x0C60 ;DMA Channel 3 Source DestinationParameters Register0000 0000 0000 0000
DMA_CCR3  	.SET 0x0C61 ;DMA Channel 3 Control Register 0000 0000 0000 0000
DMA_CICR3 	.SET 0x0C62 ;DMA Channel 3 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR3  	.SET 0x0C63;DMA Channel 3 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L3 .SET 0x0C64 ;DMA Channel 3 Source Start Address Register(lower bits)
DMA_CSSA_U3 .SET 0x0C65 ;DMA Channel 3 Source Start Address Register(upper bits)
DMA_CDSA_L3 .SET 0x0C66 ;DMA Channel 3 Destination Start Address Register(lower bits)
DMA_CDSA_U3 .SET 0x0C67 ;DMA Channel 3 Destination Start Address Register(upper bits)
DMA_CEN3  	.SET 0x0C68 ;DMA Channel 3 Element Number Register Undefined
DMA_CFN3 	.SET 0x0C69 ;DMA Channel 3 Frame Number Register Undefined
DMA_CFI3 	.SET 0x0C6A ;DMA Channel 3 Frame Index Register Undefined
DMA_CEI3 	.SET 0x0C6B ;DMA Channel 3 Element Index Register Undefined
*****************CHANNEL #4 REGISTERS
DMA_CSDP4 	.SET 0x0C80 ;DMA Channel 4 Source DestinationParameters Register0000 0000 0000 0000
DMA_CCR4  	.SET 0x0C81 ;DMA Channel 4 Control Register 0000 0000 0000 0000
DMA_CICR4 	.SET 0x0C82 ;DMA Channel 4 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR4  	.SET 0x0C83 ;DMA Channel 4 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L4 .SET 0x0C84 ;DMA Channel 4 Source Start Address Register(lower bits)
DMA_CSSA_U4 .SET 0x0C85 ;DMA Channel 4 Source Start Address Register(upper bits)
DMA_CDSA_L4 .SET 0x0C86 ;DMA Channel 4 Destination Start Address Register(lower bits)
DMA_CDSA_U4 .SET 0x0C87 ;DMA Channel 4 Destination Start Address Register(upper bits)Undefined
DMA_CEN4 	.SET 0x0C88 ;DMA Channel 4 Element Number Register Undefined
DMA_CFN4 	.SET 0x0C89 ;DMA Channel 4 Frame Number Register Undefined
DMA_CFI4 	.SET 0x0C8A ;DMA Channel 4 Frame Index Register Undefined
DMA_CEI4 	.SET 0x0C8B ;DMA Channel 4 Element Index Register Undefined
*************CHANNEL #5 REGISTERS
DMA_CSDP5 	.SET 0x0CA0 ;DMA Channel 5 Source DestinationParameters Register0000 0000 0000 0000
DMA_CCR5  	.SET 0x0CA1 ;DMA Channel 5 Control Register 0000 0000 0000 0000
DMA_CICR5 	.SET 0x0CA2 ;DMA Channel 5 Interrupt Control Register xxxx xxxx xx00 0011
DMA_CSR5  	.SET 0x0CA3 ;DMA Channel 5 Status Register xxxx xxxx xx00 0000
DMA_CSSA_L5 .SET 0x0CA4 ;DMA Channel 5 Source Start Address Register(lower bits)Undefined
DMA_CSSA_U5 .SET 0x0CA5 ;DMA Channel 5 Source Start Address Register(upper bits)Undefined
DMA_CDSA_L5 .SET 0x0CA6 ;DMA Channel 5 Destination Start Address Register(lower bits)Undefined
DMA_CDSA_U5 .SET 0x0CA7 ;DMA Channel 5 Destination Start Address Register(upper bits)Undefined
DMA_CEN5 	.SET 0x0CA8 ;DMA Channel 5 Element Number Register Undefined
DMA_CFN5 	.SET 0x0CA9 ;DMA Channel 5 Frame Number Register Undefined
DMA_CFI5 	.SET 0x0CAA ;DMA Channel 5 Frame Index Register Undefined
DMA_CEI5 	.SET 0x0CAB ;DMA Channel 5 Element Index Register Undefined