📄 dspilbc_mic_duplex_9a.mdl
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}
Line {
SrcBlock "Vector Quantizer\nDecoder2"
SrcPort 1
Points [40, 0; 0, -50]
DstBlock "Concatenation of\nQuantized LSFs"
DstPort 2
}
Line {
SrcBlock "Vector Quantizer\nDecoder3"
SrcPort 1
Points [70, 0; 0, -100]
DstBlock "Concatenation of\nQuantized LSFs"
DstPort 3
}
Line {
SrcBlock "Concatenation of\nQuantized LSFs"
SrcPort 1
DstBlock "Sort"
DstPort 1
}
Line {
SrcBlock "Sort"
SrcPort 1
DstBlock "Find Synthesis Filters (3.2.6)"
DstPort 1
}
Line {
SrcBlock "Find Synthesis Filters (3.2.6)"
SrcPort 1
DstBlock "Synthesis"
DstPort 1
}
Line {
SrcBlock "Frame Conversion1"
SrcPort 1
Points [10, 0]
Branch {
Points [0, 70]
Branch {
Points [0, 70]
DstBlock "Selector5"
DstPort 1
}
Branch {
DstBlock "Selector4"
DstPort 1
}
}
Branch {
DstBlock "Selector3"
DstPort 1
}
}
}
}
Block {
BlockType FrameConversion
Name "Frame Conversion2"
Ports [1, 1]
Position [540, 101, 590, 129]
ShowName off
OutFrame "Sample-based"
}
Block {
BlockType Selector
Name "Selector1"
Ports [2, 1]
Position [265, 119, 320, 161]
ShowName off
NumberOfDimensions "2"
InputPortWidth "3"
IndexOptions "Select all,Index vector (port)"
Indices "-1,-1"
OutputSizes "1"
}
Block {
BlockType Outport
Name "Residual"
Position [800, 188, 830, 202]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "Synthesis"
Position [275, 173, 305, 187]
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
SrcPort 1
DstBlock "Residual"
DstPort 1
}
Line {
SrcBlock "Gain Indices"
SrcPort 1
DstBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
DstPort 3
}
Line {
SrcBlock "Code Indices"
SrcPort 1
DstBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
DstPort 2
}
Line {
SrcBlock "Decode Start State"
SrcPort 1
DstBlock "Frame Conversion2"
DstPort 1
}
Line {
SrcBlock "Start State Gain Index"
SrcPort 1
DstBlock "Decode Start State"
DstPort 2
}
Line {
SrcBlock "Start State Indices"
SrcPort 1
DstBlock "Decode Start State"
DstPort 1
}
Line {
SrcBlock "Decoder LPC Analysis (4.1)"
SrcPort 1
Points [25, 0]
Branch {
DstBlock "Selector1"
DstPort 1
}
Branch {
Points [0, 50]
DstBlock "Synthesis"
DstPort 1
}
}
Line {
SrcBlock "Lsf Indices"
SrcPort 1
DstBlock "Decoder LPC Analysis (4.1)"
DstPort 1
}
Line {
SrcBlock "State First"
SrcPort 1
Points [255, 0]
Branch {
DstBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
DstPort 5
}
Branch {
Points [0, -85]
DstBlock "Decode Start State"
DstPort 4
}
}
Line {
SrcBlock "Selector1"
SrcPort 1
DstBlock "Decode Start State"
DstPort 3
}
Line {
SrcBlock "Start State Number"
SrcPort 1
Points [160, 0]
Branch {
DstBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
DstPort 4
}
Branch {
Points [0, -85]
DstBlock "Selector1"
DstPort 2
}
}
Line {
SrcBlock "Frame Conversion2"
SrcPort 1
DstBlock "Decode Remaining Sub-Blocks (4.3 - 4.4)"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Delay1"
Ports [1, 1]
Position [160, 370, 195, 390]
ShowName off
SourceBlock "dspsigops/Delay"
SourceType "Delay"
dly_unit "Frames"
delay "1"
ic_detail "off"
dif_ic_for_ch "off"
dif_ic_for_dly "off"
ic "0"
reset_popup "None"
}
Block {
BlockType Reference
Name "Delay2"
Ports [1, 1]
Position [160, 410, 195, 430]
ShowName off
SourceBlock "dspsigops/Delay"
SourceType "Delay"
dly_unit "Frames"
delay "1"
ic_detail "off"
dif_ic_for_ch "off"
dif_ic_for_dly "off"
ic "0"
reset_popup "None"
}
Block {
BlockType Constant
Name "Enable PLC"
Position [160, 336, 195, 354]
NamePlacement "alternate"
OutDataTypeMode "boolean"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "boolean"
}
Block {
BlockType Reference
Name "High Pass Filter (4.8)"
Ports [1, 1]
Position [645, 118, 720, 162]
DialogController "dspdialog.DigitalFilter"
DialogControllerArgs "DataTag3"
SourceBlock "dsparch4/Digital Filter"
SourceType "Digital Filter"
TypePopup "IIR (poles & zeros)"
IIRFiltStruct "Direct form II transposed"
AllPoleFiltStruct "Direct form"
FIRFiltStruct "Direct form"
CoeffSource "Specify via dialog"
NumCoeffs "ilbc.hpo_zero_coefsTbl"
DenCoeffs "ilbc.hpo_pole_coefsTbl"
BiQuadCoeffs "[1 0.3 0.4 1 0.1 0.2]"
LatticeCoeffs "[0.2 0.4]"
denIgnore "on"
FiltPerSampPopup "One filter per frame"
IC "0"
ICnum "0"
ICden "0"
additionalParams "off"
allowOverrides "on"
showCoeff "off"
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
secondCoeffMode "Same as numerator"
secondCoeffWordLength "16"
secondCoeffFracLength "15"
thirdCoeffMode "Same as input"
thirdCoeffWordLength "16"
thirdCoeffFracLength "15"
showOut "off"
outputMode "Same as accumulator"
outputWordLength "16"
outputFracLength "15"
showAcc "off"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "30"
showMpy "off"
prodOutputMode "Same as input"
prodOutputWordLength "32"
prodOutputFracLength "30"
showMem "off"
memoryMode "Same as accumulator"
memoryWordLength "16"
memoryFracLength "15"
roundingMode "Floor"
overflowMode "off"
ScaleValues "1"
scaleValueFracLength "14"
tapSumMode "Same as input"
tapSumWordLength "32"
tapSumFracLength "30"
stageIOMode "Same as input"
stageIOWordLength "16"
stageInFracLength "15"
stageOutFracLength "15"
LockScale "off"
FilterSource "Specify via dialog"
dfiltObjectName "dfilt.dffir([1 2 1])"
multiplicandMode "Same as output"
multiplicandWordLength "32"
multiplicandFracLength "30"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Ports [2, 1]
Position [245, 323, 275, 352]
NamePlacement "alternate"
ShowName off
AllPortsSameDT off
OutDataTypeMode "boolean"
OutDataTypeStr "boolean"
}
Block {
BlockType Logic
Name "Logical\nOperator1"
Ports [1, 1]
Position [206, 295, 234, 315]
BlockRotation 270
BlockMirror on
NamePlacement "alternate"
ShowName off
Operator "NOT"
AllPortsSameDT off
OutDataTypeMode "boolean"
OutDataTypeStr "boolean"
}
Block {
BlockType MultiPortSwitch
Name "Multiport\nSwitch"
Ports [3, 1]
Position [415, 64, 435, 116]
ShowName off
Inputs "2"
zeroidx on
InputSameDT off
OutDataType "sfix(16)"
OutScaling "2^0"
SaturateOnIntegerOverflow off
}
Block {
BlockType MultiPortSwitch
Name "Multiport\nSwitch1"
Ports [3, 1]
Position [415, 164, 435, 216]
ShowName off
Inputs "2"
zeroidx on
InputSameDT off
OutDataType "sfix(16)"
OutScaling "2^0"
SaturateOnIntegerOverflow off
}
Block {
BlockType SubSystem
Name "Packet Loss Concealment (4.5)"
Ports [2, 2, 1]
Position [225, 361, 360, 439]
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Reusable function"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Packet Loss Concealment (4.5)"
Location [99, 111, 1130, 442]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "Last Residual"
Position [30, 153, 60, 167]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "Last Synthesis"
Position [30, 283, 60, 297]
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType EnablePort
Name "Enable"
Ports []
Position [35, 20, 55, 40]
StatesWhenEnabling "reset"
}
Block {
BlockType Bias
Name "Bias1"
Position [110, 42, 140, 58]
ShowName off
Bias "1"
SaturateOnIntegerOverflow off
}
Block {
BlockType Bias
Name "Bias2"
Position [440, 166, 480, 184]
ShowName off
Bias "ilbc.BLOCKL{ilbcMode}"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "Compare\nTo Constant"
Ports [1, 1]
Position [110, 67, 140, 83]
ShowName off
SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Constant"
SourceType "Compare To Constant"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData "off"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
relop "=="
const "0"
LogicOutDataTypeMode "boolean"
ZeroCross "off"
}
Block {
BlockType Refere
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