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📄 dspilbc_mic_duplex_9a.mdl

📁 udp数据库仿真模型,udp数据库仿真模型,udp数据库仿真模型
💻 MDL
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		  padEnd		  "0"
		  outSizeMode		  "User-specified"
		  outSize		  "1"
		  padSigAt		  "Beginning"
		  trunc_flag		  "None"
		  outputMode		  "Same as input"
		  outputWordLength	  "0"
		  outputFracLength	  "0"
		  accumMode		  "Same as input"
		  accumWordLength	  "0"
		  accumFracLength	  "0"
		  roundingMode		  "Floor"
		  overflowMode		  "off"
		  LockScale		  "off"
		  truncOrWrapMode	  "Truncate"
		  wrap_flag		  "None"
		}
		Block {
		  BlockType		  Selector
		  Name			  "Selector1"
		  Ports			  [2, 1]
		  Position		  [235, 209, 290, 251]
		  ShowName		  off
		  NumberOfDimensions	  "2"
		  IndexMode		  "Zero-based"
		  InputPortWidth	  "3"
		  IndexOptions		  "Select all,Index vector (port)"
		  Indices		  "-1,0"
		  OutputSizes		  "1"
		}
		Block {
		  BlockType		  Selector
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		  ShowName		  off
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		  IndexMode		  "Zero-based"
		  InputPortWidth	  "3"
		  IndexOptions		  "Select all,Index vector (port)"
		  Indices		  "-1,0"
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		Block {
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		  Position		  [110, 50, 150, 80]
		  ShowName		  off
		  SourceBlock		  "dspmtrx3/Submatrix"
		  SourceType		  "Submatrix"
		  RowSpan		  "Range of rows"
		  RowStartMode		  "Index"
		  RowStartIndex		  "41"
		  RowEndMode		  "Last"
		  RowEndIndex		  "1"
		  ColSpan		  "All columns"
		  ColStartMode		  "First"
		  ColStartIndex		  "1"
		  ColEndMode		  "Last"
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		Block {
		  BlockType		  Reference
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		  Position		  [175, 50, 210, 110]
		  ShowName		  off
		  SourceBlock		  "simulink/Additional Math\n& Discrete/Additional\nDiscrete/Unit Delay\nExternal IC"
		  SourceType		  "Unit Delay External Initial Condition"
		  ShowPortLabels	  "FromPortIcon"
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		  FunctionWithSeparateData "off"
		  RTWMemSecFuncInitTerm	  "Inherit from model"
		  RTWMemSecFuncExecute	  "Inherit from model"
		  RTWMemSecDataConstants  "Inherit from model"
		  RTWMemSecDataInternal	  "Inherit from model"
		  RTWMemSecDataParameters "Inherit from model"
		  tsamp			  "-1"
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		Block {
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		  Name			  "Residual"
		  Position		  [550, 223, 580, 237]
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		  OutScaling		  "2^0"
		}
		Line {
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		}
		Line {
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		  DstBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
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		Line {
		  SrcBlock		  "Compare\nTo Constant2"
		  SrcPort		  1
		  DstBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
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		Line {
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		  DstBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
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		Line {
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		  DstBlock		  "Unit Delay\nExternal IC"
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		Line {
		  SrcBlock		  "Submatrix"
		  SrcPort		  1
		  DstBlock		  "Unit Delay\nExternal IC"
		  DstPort		  1
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		Line {
		  SrcBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
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		  Points		  [20, 0]
		  Branch {
		    Points		    [0, -205; -495, 0; 0, 40]
		    DstBlock		    "Frame Conversion1"
		    DstPort		    1
		  }
		  Branch {
		    DstBlock		    "Residual"
		    DstPort		    1
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		}
		Line {
		  SrcBlock		  "Initial Codebook"
		  SrcPort		  1
		  DstBlock		  "Pad"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Code Indices"
		  SrcPort		  1
		  DstBlock		  "Selector3"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Gain Indices"
		  SrcPort		  1
		  DstBlock		  "Selector1"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Unit Delay\nExternal IC"
		  SrcPort		  1
		  DstBlock		  "Frame Conversion3"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Selector1"
		  SrcPort		  1
		  DstBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
		  DstPort		  4
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		Line {
		  SrcBlock		  "Selector3"
		  SrcPort		  1
		  DstBlock		  "Decode Remaining Sub-Blocks (4.3 - 4.4)"
		  DstPort		  3
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		Line {
		  SrcBlock		  "Frame Conversion1"
		  SrcPort		  1
		  DstBlock		  "Submatrix"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "For Iterator"
		  SrcPort		  1
		  Points		  [15, 0]
		  Branch {
		    DstBlock		    "Decode Remaining Sub-Blocks (4.3 - 4.4)"
		    DstPort		    5
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		  Branch {
		    Points		    [0, -40]
		    Branch {
		    DstBlock		    "Selector1"
		    DstPort		    2
		    }
		    Branch {
		    Points		    [0, -50]
		    Branch {
		    Points		    [0, -60]
		    DstBlock		    "Compare\nTo Constant2"
		    DstPort		    1
		    }
		    Branch {
		    DstBlock		    "Selector3"
		    DstPort		    2
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		    }
		  }
		}
	      }
	    }
	    Block {
	      BlockType		      Reference
	      Name		      "Decode Start State"
	      Ports		      [4, 1]
	      Position		      [355, 18, 510, 212]
	      SourceBlock	      "dspilbclib/Decode Start State"
	      SourceType	      "SubSystem"
	      ShowPortLabels	      "FromPortIcon"
	      SystemSampleTime	      "-1"
	      FunctionWithSeparateData "off"
	      RTWMemSecFuncInitTerm   "Inherit from model"
	      RTWMemSecFuncExecute    "Inherit from model"
	      RTWMemSecDataConstants  "Inherit from model"
	      RTWMemSecDataInternal   "Inherit from model"
	      RTWMemSecDataParameters "Inherit from model"
	    }
	    Block {
	      BlockType		      SubSystem
	      Name		      "Decoder LPC Analysis (4.1)"
	      Ports		      [1, 1]
	      Position		      [100, 105, 215, 155]
	      TreatAsAtomicUnit	      on
	      MinAlgLoopOccurrences   off
	      PropExecContextOutsideSubsystem off
	      RTWSystemCode	      "Reusable function"
	      FunctionWithSeparateData off
	      Opaque		      off
	      RequestExecContextInheritance off
	      MaskHideContents	      off
	      System {
		Name			"Decoder LPC Analysis (4.1)"
		Location		[23, 89, 951, 319]
		Open			off
		ModelBrowserVisibility	off
		ModelBrowserWidth	200
		ScreenColor		"white"
		PaperOrientation	"landscape"
		PaperPositionMode	"auto"
		PaperType		"usletter"
		PaperUnits		"inches"
		TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
		TiledPageScale		1
		ShowPageBoundaries	off
		ZoomFactor		"100"
		Block {
		  BlockType		  Inport
		  Name			  "LSF Indices"
		  Position		  [35, 38, 65, 52]
		  IconDisplay		  "Port number"
		  OutDataType		  "sfix(16)"
		  OutScaling		  "2^0"
		}
		Block {
		  BlockType		  Concatenate
		  Name			  "Concatenation of\nQuantized LSFs"
		  Ports			  [3, 1]
		  Position		  [450, 33, 505, 97]
		  ShowName		  off
		  NumInputs		  "3"
		  Mode			  "Multidimensional array"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Find Synthesis Filters (3.2.6)"
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		  Position		  [625, 41, 840, 89]
		  SourceBlock		  "dspilbclib/Find LPC Filters"
		  SourceType		  "SubSystem"
		  ShowPortLabels	  "FromPortIcon"
		  SystemSampleTime	  "-1"
		  FunctionWithSeparateData "off"
		  RTWMemSecFuncInitTerm	  "Inherit from model"
		  RTWMemSecFuncExecute	  "Inherit from model"
		  RTWMemSecDataConstants  "Inherit from model"
		  RTWMemSecDataInternal	  "Inherit from model"
		  RTWMemSecDataParameters "Inherit from model"
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		Block {
		  BlockType		  FrameConversion
		  Name			  "Frame Conversion1"
		  Ports			  [1, 1]
		  Position		  [90, 32, 130, 58]
		  ShowName		  off
		}
		Block {
		  BlockType		  Selector
		  Name			  "Selector3"
		  Ports			  [1, 1]
		  Position		  [170, 36, 220, 54]
		  ShowName		  off
		  NumberOfDimensions	  "2"
		  InputPortWidth	  "3"
		  IndexOptions		  "Index vector (dialog),Select all"
		  Indices		  "1,-1"
		  OutputSizes		  "1"
		}
		Block {
		  BlockType		  Selector
		  Name			  "Selector4"
		  Ports			  [1, 1]
		  Position		  [170, 106, 220, 124]
		  ShowName		  off
		  NumberOfDimensions	  "2"
		  InputPortWidth	  "3"
		  IndexOptions		  "Index vector (dialog),Select all"
		  Indices		  "2,-1"
		  OutputSizes		  "1"
		}
		Block {
		  BlockType		  Selector
		  Name			  "Selector5"
		  Ports			  [1, 1]
		  Position		  [170, 176, 220, 194]
		  ShowName		  off
		  NumberOfDimensions	  "2"
		  InputPortWidth	  "3"
		  IndexOptions		  "Index vector (dialog),Select all"
		  Indices		  "3,-1"
		  OutputSizes		  "1"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Sort"
		  Ports			  [1, 1]
		  Position		  [535, 33, 595, 97]
		  ShowName		  off
		  DialogController	  "dspDDGCreate"
		  DialogControllerArgs	  "DataTag2"
		  SourceBlock		  "dspstat3/Sort"
		  SourceType		  "Sort"
		  otype			  "Value"
		  dir			  "Ascending"
		  sortAlg		  "Quick sort"
		  additionalParams	  "off"
		  allowOverrides	  "on"
		  accumMode		  "Same as input"
		  accumWordLength	  "32"
		  accumFracLength	  "30"
		  prodOutputMode	  "Same as input"
		  prodOutputWordLength	  "32"
		  prodOutputFracLength	  "30"
		  roundingMode		  "Floor"
		  overflowMode		  "off"
		  LockScale		  "off"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Vector Quantizer\nDecoder1"
		  Ports			  [1, 1]
		  Position		  [250, 18, 345, 72]
		  ShowName		  off
		  SourceBlock		  "dspquant2/Vector Quantizer\nDecoder"
		  SourceType		  "Vector Quantizer Decoder"
		  CBsource		  "Specify via dialog"
		  invalidin		  "Clip"
		  codebook		  "ilbc.lsfCbTbl1"
		  dataType		  "Inherit via back propagation"
		  isSigned		  "on"
		  wordLen		  "16"
		  udDataType		  "float('single')"
		  fracBitsMode		  "Best precision"
		  numFracBits		  "7"
		}
		Block {
		  BlockType		  Reference
		  Name			  "Vector Quantizer\nDecoder2"
		  Ports			  [1, 1]
		  Position		  [250, 88, 345, 142]
		  ShowName		  off
		  SourceBlock		  "dspquant2/Vector Quantizer\nDecoder"
		  SourceType		  "Vector Quantizer Decoder"
		  CBsource		  "Specify via dialog"
		  invalidin		  "Clip"
		  codebook		  "ilbc.lsfCbTbl2"
		  dataType		  "Inherit via back propagation"
		  isSigned		  "on"
		  wordLen		  "16"
		  udDataType		  "float('single')"
		  fracBitsMode		  "Best precision"
		  numFracBits		  "7"
		}
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		  BlockType		  Reference
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		  Ports			  [1, 1]
		  Position		  [250, 158, 345, 212]
		  ShowName		  off
		  SourceBlock		  "dspquant2/Vector Quantizer\nDecoder"
		  SourceType		  "Vector Quantizer Decoder"
		  CBsource		  "Specify via dialog"
		  invalidin		  "Clip"
		  codebook		  "ilbc.lsfCbTbl3"
		  dataType		  "Inherit via back propagation"
		  isSigned		  "on"
		  wordLen		  "16"
		  udDataType		  "float('single')"
		  fracBitsMode		  "Best precision"
		  numFracBits		  "7"
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		  BlockType		  Outport
		  Name			  "Synthesis"
		  Position		  [870, 58, 900, 72]
		  IconDisplay		  "Port number"
		  OutDataType		  "sfix(16)"
		  OutScaling		  "2^0"
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		  SrcPort		  1
		  DstBlock		  "Vector Quantizer\nDecoder1"
		  DstPort		  1
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		  SrcPort		  1
		  DstBlock		  "Vector Quantizer\nDecoder2"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Selector5"
		  SrcPort		  1
		  DstBlock		  "Vector Quantizer\nDecoder3"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "LSF Indices"
		  SrcPort		  1
		  DstBlock		  "Frame Conversion1"
		  DstPort		  1
		}
		Line {
		  SrcBlock		  "Vector Quantizer\nDecoder1"
		  SrcPort		  1
		  DstBlock		  "Concatenation of\nQuantized LSFs"
		  DstPort		  1

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