📄 mada_bo_fluxgggg.mdl
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}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [215, 160, 235, 180]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [415, 160, 435, 180]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [650, 160, 670, 180]
ShowName off
IconShape "round"
Inputs "-+|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
Port {
PortNumber 1
Name "vds*"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Sum
Name "Sum3"
Ports [2, 1]
Position [435, 380, 455, 400]
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum4"
Ports [2, 1]
Position [420, 280, 440, 300]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum5"
Ports [2, 1]
Position [625, 280, 645, 300]
ShowName off
IconShape "round"
Inputs "++|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
Port {
PortNumber 1
Name "vqs*"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Sum
Name "Sum6"
Ports [2, 1]
Position [105, 285, 125, 305]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Sum
Name "Sum7"
Ports [2, 1]
Position [225, 110, 245, 130]
ShowName off
IconShape "round"
Inputs "++|"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Gain
Name "Tr"
Position [115, 25, 145, 55]
NamePlacement "alternate"
Gain "tr"
}
Block {
BlockType TransferFcn
Name "Transfer Fcn"
Position [110, 102, 170, 138]
Numerator "[lm]"
Denominator "[tr 1]"
}
Block {
BlockType TransportDelay
Name "Transport\nDelay"
Position [120, 615, 150, 645]
Orientation "left"
DelayTime "0.5"
}
Block {
BlockType Reference
Name "flux regul"
Ports [1, 1]
Position [270, 155, 300, 185]
SourceBlock "simulink_extras/Additional\nLinear/PID Cont"
"roller"
SourceType "PID Controller"
ShowPortLabels on
P "kpf"
I "kif"
D "0"
Port {
PortNumber 1
Name "ids*"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "flux regul1"
Ports [1, 1]
Position [150, 280, 180, 310]
SourceBlock "simulink_extras/Additional\nLinear/PID Cont"
"roller"
SourceType "PID Controller"
ShowPortLabels on
P "kpw"
I "kiw"
D "0"
Port {
PortNumber 1
Name "cem*"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "ids regul"
Ports [1, 1]
Position [520, 155, 550, 185]
SourceBlock "simulink_extras/Additional\nLinear/PID Cont"
"roller"
SourceType "PID Controller"
ShowPortLabels on
P "kpd"
I "kid"
D "0"
Port {
PortNumber 1
Name "vds_r"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Reference
Name "iqs regul"
Ports [1, 1]
Position [510, 275, 540, 305]
SourceBlock "simulink_extras/Additional\nLinear/PID Cont"
"roller"
SourceType "PID Controller"
ShowPortLabels on
P "kpd"
I "kid"
D "0"
Port {
PortNumber 1
Name "vqs_r"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Block {
BlockType Fcn
Name "vdrr"
Position [370, 510, 430, 540]
Expr "1/tr*(u(1)+lm*u(2))"
}
Block {
BlockType Fcn
Name "vds_c"
Position [560, 25, 620, 55]
Expr "sig*ls*u(4)*u(3)"
}
Block {
BlockType Fcn
Name "vds_c1"
Position [360, 376, 395, 404]
Expr "(lm*rr/(lr*u(2)))*u(1)-u(3)"
}
Block {
BlockType Fcn
Name "vqrr"
Position [370, 580, 430, 610]
Expr "1/tr*u(3)+u(1)*u(4)"
}
Block {
BlockType Fcn
Name "vqs_c"
Position [565, 90, 625, 120]
Expr "u(4)*lm/lr*u(1)+u(4)*sig*ls*u(2)"
}
Block {
BlockType Outport
Name "vds*"
Position [720, 163, 750, 177]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "vqs*"
Position [720, 283, 750, 297]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "ws"
Position [630, 383, 660, 397]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "wg"
Position [560, 418, 590, 432]
Port "4"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "vdr"
Position [755, 518, 785, 532]
Port "5"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "vqr"
Position [755, 588, 785, 602]
Port "6"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "wref"
SrcPort 1
DstBlock "Sum6"
DstPort 1
}
Line {
SrcBlock "Saturation2"
SrcPort 1
DstBlock "Sum4"
DstPort 1
}
Line {
SrcBlock "Saturation"
SrcPort 1
DstBlock "Sum1"
DstPort 2
}
Line {
SrcBlock "Sum6"
SrcPort 1
DstBlock "flux regul1"
DstPort 1
}
Line {
Name "cem*"
Labels [0, 0]
SrcBlock "flux regul1"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Sum3"
SrcPort 1
Points [30, 0]
Branch {
DstBlock "ws"
DstPort 1
}
Branch {
Points [0, -300]
DstBlock "Mux"
DstPort 4
}
}
Line {
SrcBlock "vds_c1"
SrcPort 1
Points [5, 0]
Branch {
Points [0, 35]
DstBlock "wg"
DstPort 1
}
Branch {
DstBlock "Sum3"
DstPort 1
}
}
Line {
SrcBlock "Mux1"
SrcPort 1
DstBlock "vds_c1"
DstPort 1
}
Line {
SrcBlock "wm"
SrcPort 1
Points [10, 0]
Branch {
Points [0, -290]
DstBlock "Subsystem1"
DstPort 1
}
Branch {
Points [20, 0]
Branch {
DstBlock "Sum6"
DstPort 2
}
Branch {
Points [330, 0]
DstBlock "Sum3"
DstPort 2
}
}
Branch {
Points [0, 120]
DstBlock "Mux2"
DstPort 4
}
}
Line {
SrcBlock "iqs"
SrcPort 1
Points [255, 0]
Branch {
Points [95, 0]
DstBlock "Sum4"
DstPort 2
}
Branch {
Points [0, -275]
DstBlock "Mux"
DstPort 3
}
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0; 15, 0]
Branch {
Points [0, 35]
DstBlock "vqs_c"
DstPort 1
}
Branch {
Points [0, -30]
DstBlock "vds_c"
DstPort 1
}
}
Line {
SrcBlock "vqs_c"
SrcPort 1
Points [5, 0]
DstBlock "Sum5"
DstPort 1
}
Line {
SrcBlock "vds_c"
SrcPort 1
Points [35, 0]
DstBlock "Sum2"
DstPort 1
}
Line {
Name "iqs*"
Labels [0, 0]
SrcBlock "Product"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Saturation2"
DstPort 1
}
Branch {
Points [0, 85]
Branch {
DstBlock "Mux1"
DstPort 1
}
Branch {
Points [-25, 0]
DstBlock "Mux2"
DstPort 3
}
}
}
Line {
SrcBlock "Subsystem1"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 85; 35, 0]
Branch {
Points [55, 0]
DstBlock "Product"
DstPort 1
}
Branch {
Points [0, 135; 70, 0]
Branch {
DstBlock "Mux1"
DstPort 2
}
Branch {
Points [0, 145]
DstBlock "Mux2"
DstPort 1
}
}
}
Branch {
DstBlock "Sum"
DstPort 2
}
}
Line {
SrcBlock "ids"
SrcPort 1
Points [5, 0]
Branch {
Points [10, 0]
Branch {
DstBlock "Transfer Fcn"
DstPort 1
}
Branch {
Points [0, -35; 335, 0]
Branch {
DstBlock "Sum1"
DstPort 1
}
Branch {
Points [0, -25]
DstBlock "Mux"
DstPort 2
}
}
}
Branch {
Points [0, 430]
DstBlock "Mux2"
DstPort 2
}
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Product"
DstPort 2
}
Line {
Name "vqs*"
Labels [0, 0]
SrcBlock "Sum5"
SrcPort 1
DstBlock "vqs*"
DstPort 1
}
Line {
Name "vqs_r"
Labels [0, 0]
SrcBlock "iqs regul"
SrcPort 1
DstBlock "Sum5"
DstPort 2
}
Line {
SrcBlock "Sum4"
SrcPort 1
DstBlock "iqs regul"
DstPort 1
}
Line {
Name "vds*"
Labels [0, 0]
SrcBlock "Sum2"
SrcPort 1
DstBlock "vds*"
DstPort 1
}
Line {
Name "vds_r"
Labels [0, 0]
SrcBlock "ids regul"
SrcPort 1
DstBlock "Sum2"
DstPort 2
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "ids regul"
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