lcd_pg320240.src

how to use display powertip PG 320x240

	?SYMB	'',$,17,106
; lcd_pg320240.c  107	//*****************************************************************************
; lcd_pg320240.c  108	unsigned char lcd_read_reg(unsigned int Address,unsigned char Reg)
; lcd_pg320240.c  109	{
	?LINE	109
	PUBLIC	_lcd_read_reg
	?SYMB	'lcd_read_reg',_lcd_read_reg,37,3
	?SYMB	'',109,8,34
_lcd_read_reg	PROC	NEAR
	?SYMB	'',00H,95,0
	MOV	[-R0],R13
	?SYMB	'',$,96,2
	MOV	[-R0],R12
	?SYMB	'',$,96,4
	SUB	R0,#02h
	?SYMB	'',$,96,6
; Locals:
;     Address = offset 2
;     Data = offset 0
;     Reg = offset 4
; 
; Statics:
; 
; CSEs:
; 
	?LINE	109
	?SYMB	'Address',1,99,18
	?SYMB	'-4',$,101,1
	?SYMB	'Reg',3,99,3
	?SYMB	'-2',$,101,3
; lcd_pg320240.c  110		unsigned int Data;
	?LINE	110
	?SYMB	'Data',2,98,18
	?SYMB	'-6',$,101,2
; lcd_pg320240.c  111	    CS = 0;
	?LINE	111
	BCLR	P2.9
; lcd_pg320240.c  112		READ 	= 1;
	?LINE	112
	BSET	P2.14
; lcd_pg320240.c  113	    WRITE 	= 1;
	?LINE	113
	BSET	P2.12
; lcd_pg320240.c  114	   // AB16 = 0;
; lcd_pg320240.c  115	    if (Reg) Address += REG_OFFSET;
	?LINE	115
	MOVB	RL1,[R0+#04H]
	JMPR	cc_Z,_9
	MOV	R12,[R0+#02H]
	ADD	R12,#0FFE0h
	MOV	[R0+#02H],R12
_9:
; lcd_pg320240.c  116		lcd_write_address(Address);
	?LINE	116
	MOV	R12,[R0+#02H]
	CALLR	_lcd_write_address
; lcd_pg320240.c  117	  //  AB16 = 1;
; lcd_pg320240.c  118	    SETDATAINPUT;
	?LINE	118
	MOV	R12,DP3
	AND	R12,#0FF00h
	MOV	DP3,R12
; lcd_pg320240.c  119		READ 	= 0;
	?LINE	119
	BCLR	P2.14
; lcd_pg320240.c  120	    while(!WAIT);
	?LINE	120
	JMPR	cc_UC,_11
_10:
_11:
_12:
	JNB	P2.10,_12
; lcd_pg320240.c  121		Data 	= DATA;
	?LINE	121
	MOV	[R0],P3
; lcd_pg320240.c  122	    READ 	= 1;
	?LINE	122
	BSET	P2.14
; lcd_pg320240.c  123	    SETDATAOUTPUT;
	?LINE	123
	MOV	R12,DP3
	OR	R12,#0FFh
	MOV	DP3,R12
; lcd_pg320240.c  124	    CS = 1;
	?LINE	124
	BSET	P2.9
; lcd_pg320240.c  125	   //	Data =  reverseLSB_MSB(Data); 
; lcd_pg320240.c  126	    return(Data);    
	?LINE	126
	MOVB	RL4,[R0]
; lcd_pg320240.c  127	}
	?LINE	127
_13:
	?SYMB	'',$,102,2
	?SYMB	'',$,102,3
	?SYMB	'',$,102,1
	ADD	R0,#06h
	?SYMB	'',$,96,0
	RET
_lcd_read_reg	ENDP
	?SYMB	'',$,17,127
; lcd_pg320240.c  128	//-----------------------------------------------------------------------------
; lcd_pg320240.c  129	void lcd_write (unsigned int Address, unsigned char Data)
; lcd_pg320240.c  130	{
	?LINE	130
	PUBLIC	_lcd_write
	?SYMB	'lcd_write',_lcd_write,37,1
	?SYMB	'',130,8,34
_lcd_write	PROC	NEAR
	?SYMB	'',00H,95,0
	MOV	[-R0],R13
	?SYMB	'',$,96,2
	MOV	[-R0],R12
	?SYMB	'',$,96,4
; Locals:
;     Address = offset 0
;     Data = offset 2
; 
; Statics:
; 
; CSEs:
; 
	?LINE	130
	?SYMB	'Address',1,99,18
	?SYMB	'-4',$,101,1
	?SYMB	'Data',2,99,3
	?SYMB	'-2',$,101,2
; lcd_pg320240.c  131	  	CS = 0;
	?LINE	131
	BCLR	P2.9
; lcd_pg320240.c  132	  	lcd_write_address(Address);
	?LINE	132
	MOV	R12,[R0]
	CALLR	_lcd_write_address
; lcd_pg320240.c  133		lcd_write_data(Data);
	?LINE	133
	MOVB	RL1,[R0+#02H]
	MOVBZ	R12,RL1
	CALLA	cc_UC,_lcd_write_data
; lcd_pg320240.c  134	    CS = 1;
	?LINE	134
	BSET	P2.9
; lcd_pg320240.c  135	}
	?LINE	135
	?SYMB	'',$,102,2
	?SYMB	'',$,102,1
	ADD	R0,#04h
	?SYMB	'',$,96,0
	RET
_lcd_write	ENDP
	?SYMB	'',$,17,135
; lcd_pg320240.c  136	
; lcd_pg320240.c  137	// initializing of display
; lcd_pg320240.c  138	void lcd_init (void)
; lcd_pg320240.c  139	{
	?LINE	139
	PUBLIC	_lcd_init
	?SYMB	'lcd_init',_lcd_init,37,1
	?SYMB	'',139,8,34
_lcd_init	PROC	NEAR
	?SYMB	'',00H,95,0
	SUB	R0,#02h
	?SYMB	'',$,96,2
; Locals:
;     i = offset 0
; 
; Statics:
; 
; CSEs:
; 
; lcd_pg320240.c  140		int i;   
	?LINE	140
	?SYMB	'i',1,98,16
	?SYMB	'-2',$,101,1
; lcd_pg320240.c  141	    /* Initialize the chip. Each register is individually programmed to make comments clearer.*/
; lcd_pg320240.c  142		lcd_set_reg(0x01, 0x00); 	//Register 01h: Mode Register 0 - Mono, 4-bit format 2
	?LINE	142
	MOV	R12,#01h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  143		lcd_set_reg(0x02, 0xB0); 	//Register 02h: Mode Register 1 - 4BPP, High Performance, CLKi/2
	?LINE	143
	MOV	R12,#02h
	MOV	R13,#0B0h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  144	//	lcd_set_reg(0x02, 0x60); 	//Register 02h: Mode Register 1 - 2BPP, High Performance, CLKi/2
; lcd_pg320240.c  145	
; lcd_pg320240.c  146		lcd_set_reg(0x03, 0x03);	//Register 03h: Mode Register 2 - Normal power mode
	?LINE	146
	MOV	R12,#03h
	MOV	R13,#03h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  147	    lcd_set_reg(0x04, 0x27);	//Register 04h: Horizontal Panel Size - 320 pixels - (320/8)-1 = 39 = 27h
	?LINE	147
	MOV	R12,#04h
	MOV	R13,#027h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  148		lcd_set_reg(0x05, 0xEF);	//Register 05h: Vertical Panel Size LSB - 240 pixels
	?LINE	148
	MOV	R12,#05h
	MOV	R13,#0EFh
	CALLR	_lcd_set_reg
; lcd_pg320240.c  149		lcd_set_reg(0x06, 0x00);	//Register 06h: Vertical Panel Size MSB - (240 - 1) = 239 = EFh
	?LINE	149
	MOV	R12,#06h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  150		lcd_set_reg(0x07, 0x1E);	//Register 07h - FPLINE Start Position - not used by STN
	?LINE	150
	MOV	R12,#07h
	MOV	R13,#01Eh
	CALLR	_lcd_set_reg
; lcd_pg320240.c  151		/* Register 08h - Horizontal Non-Display Period HNDP and VNDP are calculated to achieve the
; lcd_pg320240.c  152		** desired frame rate according to:
; lcd_pg320240.c  153		** 						PCLK
; lcd_pg320240.c  154		** Frame Rate = ---------------------------
; lcd_pg320240.c  155		** 				(HDP + HNDP) * (VDP + VNDP)
; lcd_pg320240.c  156		*/
; lcd_pg320240.c  157		lcd_set_reg(0x08, 0x00);
	?LINE	157
	MOV	R12,#08h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  158		lcd_set_reg(0x09, 0x00);	//Register 09h - FPFRAME Start Position - not used by STN
	?LINE	158
	MOV	R12,#09h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  159	
; lcd_pg320240.c  160		/*  Register 0Ah - Vertical Non-Display Register Calculated in conjunction with register 08h (HNDP) to
; lcd_pg320240.c  161		achieve the desired frame rate. */
; lcd_pg320240.c  162	  //	lcd_set_reg(0x0A, 0x3B);
; lcd_pg320240.c  163		lcd_set_reg(0x0A, 0x26);
	?LINE	163
	MOV	R12,#0Ah
	MOV	R13,#026h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  164		lcd_set_reg(0x0B, 0x00);	//Register 0Bh - MOD Rate - not used by this panel
	?LINE	164
	MOV	R12,#0Bh
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  165		lcd_set_reg(0x0C, 0x00);	//Register 0Ch - Screen 1 Start Word Address LSB
	?LINE	165
	MOV	R12,#0Ch
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  166		lcd_set_reg(0x0D, 0x00);	//Register 0Dh - Screen 1 Start Word Address MS. Start address should be set to 0B
	?LINE	166
	MOV	R12,#0Dh
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  167		lcd_set_reg(0x0F, 0x00);	//Register 0Fh - Screen 2 Start Word Address LSB
	?LINE	167
	MOV	R12,#0Fh
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  168		lcd_set_reg(0x10, 0x00);	//Register 10h - Screen 2 Start Word Address MSB. Set this start address to 0 too
	?LINE	168
	MOV	R12,#010h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  169		lcd_set_reg(0x12, 0x00);	//Register 12h - Memory Address Offset. Used for setting memory to a width greater than the display size.
	?LINE	169
	MOV	R12,#012h
	MOV	R13,#00h
	CALLR	_lcd_set_reg
; lcd_pg320240.c  170								//Usually set to 0 during initialization and programmed to desired value later.
; lcd_pg320240.c  171		/* This register is used for split screen operation and should be set to 0 during initialization.
; lcd_pg320240.c  172		Set to maximum (i.e. 0x3FF). */
; lcd_pg320240.c  173		lcd_set_reg(0x13, 0xFF);	//Register 13h - Screen 1 Vertical Size LSB
	?LINE	173
	MOV	R12,#013h
	MOV	R13,#0FFh
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  174		lcd_set_reg(0x14, 0x03);	//Register 14h - Screen 1 Vertical Size MSB
	?LINE	174
	MOV	R12,#014h
	MOV	R13,#03h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  175	
; lcd_pg320240.c  176		/* Look-Up Table In this example the LUT will be programmed in the register sequence.
; lcd_pg320240.c  177			In practice the LUT would probably be done after the other registers.*/
; lcd_pg320240.c  178		lcd_set_reg(0x15, 0x00);	//Register 15h - Look-Up Table Address. Set to 0x20 to start Gray sequencing at the first LUT entry.
	?LINE	178
	MOV	R12,#015h
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  179		lcd_set_reg(0x16, 0x00);	//Register 16h - Look-Up Table Bank Select.Set all the banks to 0.
	?LINE	179
	MOV	R12,#016h
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  180		// At 4BPP this makes no difference however it will affect appearance at other color depths.
; lcd_pg320240.c  181	   	for (i = 0; i < 16; i++) { lcd_set_reg(0x17, i);lcd_set_reg(0x17, i);lcd_set_reg(0x17, i);}
	?LINE	181
	MOV	R12,#00h
	MOV	[R0],R12
	JMPR	cc_UC,_15
_14:
	MOV	R12,#017h
	MOV	R13,[R0]
	CALLA	cc_UC,_lcd_set_reg
	MOV	R12,#017h
	MOV	R13,[R0]
	CALLA	cc_UC,_lcd_set_reg
	MOV	R12,#017h
	MOV	R13,[R0]
	CALLA	cc_UC,_lcd_set_reg
	MOV	R12,[R0]
	ADD	R12,#01h
	MOV	[R0],R12
_15:
	MOV	R12,[R0]
	CMP	R12,#010h
	JMPR	cc_SLT,_14
; lcd_pg320240.c  182		   	//Register 17h - Look-Up Table Data. Write 16 RGB triplets to setup the LUT for 4BPP operation.
; lcd_pg320240.c  183			//The LUT is 16 elements deep, 4BPP uses all the idices.
; lcd_pg320240.c  184		lcd_set_reg(0x18, 0x00);	//Register 18h - GPIO Configuration - set to 0 - '0' configures the GPIO pins for input (power on default)
	?LINE	184
	MOV	R12,#018h
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  185		lcd_set_reg(0x19, 0x00);	//Register 19h - GPIO Status - set to 0
	?LINE	185
	MOV	R12,#019h
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  186	
; lcd_pg320240.c  187		lcd_set_reg(0x1A, 0x00);	//Register 1Ah - Scratch Pad - set to 0
	?LINE	187
	MOV	R12,#01Ah
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  188		lcd_set_reg(0x1B, 0x00);	//Register 1Bh - SwivelView Mode - set to 0 - disable SwivelView mode
	?LINE	188
	MOV	R12,#01Bh
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  189		lcd_set_reg(0x1C, 0xA0);	//Register 1Ch - Line Byte Count - set to 0 - Not used by landscape mode
	?LINE	189
	MOV	R12,#01Ch
	MOV	R13,#0A0h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  190		lcd_set_reg(0x1F, 0x00);	//Register 1Fh - TestMode - set to 0
	?LINE	190
	MOV	R12,#01Fh
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_set_reg
; lcd_pg320240.c  191	}
	?LINE	191
	?SYMB	'',$,102,1
	ADD	R0,#02h
	?SYMB	'',$,96,0
	RET
_lcd_init	ENDP
	?SYMB	'',$,17,191
; lcd_pg320240.c  192	
; lcd_pg320240.c  193	void lcd_clear(void)
; lcd_pg320240.c  194	{
	?LINE	194
	PUBLIC	_lcd_clear
	?SYMB	'lcd_clear',_lcd_clear,37,1
	?SYMB	'',194,8,34
_lcd_clear	PROC	NEAR
	?SYMB	'',00H,95,0
	SUB	R0,#02h
	?SYMB	'',$,96,2
; Locals:
;     i = offset 0
; 
; Statics:
; 
; CSEs:
; 
; lcd_pg320240.c  195		unsigned int i;
	?LINE	195
	?SYMB	'i',1,98,18
	?SYMB	'-2',$,101,1
; lcd_pg320240.c  196	    /* Clear the display, and all of video memory, by writing 40960 bytes of 0.
; lcd_pg320240.c  197	 	This is done because an image in display memory is not rotated with
; lcd_pg320240.c  198	 	the switch to SwivelView mode we are about to make.*/
; lcd_pg320240.c  199		for (i=0;i < 38400;i++) lcd_write(i,0x00);
	?LINE	199
	MOV	R12,#00h
	MOV	[R0],R12
	JMPR	cc_UC,_17
_16:
	MOV	R12,[R0]
	MOV	R13,#00h
	CALLA	cc_UC,_lcd_write
	MOV	R12,[R0]
	ADD	R12,#01h
	MOV	[R0],R12
_17:
	MOV	R12,[R0]
	CMP	R12,#09600h
	JMPR	cc_ULT,_16
; lcd_pg320240.c  200	}
	?LINE	200
	?SYMB	'',$,102,1
	ADD	R0,#02h
	?SYMB	'',$,96,0
	RET
_lcd_clear	ENDP
	?SYMB	'',$,17,200
LCD_PG320240_3_PR	ENDS

C166_US	SECTION	DATA WORD GLBUSRSTACK 'CUSTACK'
	DS	28
C166_US	ENDS

C166_INIT	SECTION	DATA WORD GLOBAL 'CINITROM'
	DW	06h
	DPPTR	LCD_PG320240_ID_NB_ENTRY,LCD_PG320240_IR_NB_ENTRY
	DW	030h
C166_INIT	ENDS

C166_DGROUP	DGROUP	LCD_PG320240_ID_NB
	REGDEF	R0-R15
	END