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204 $MODEL( MEDIUM)
205 $SEGMENTED
206 ASSUME DPP3:SYSTEM
207
208
209 #line 241 "c:\program files\tasking\c166 v8.0\include\head.asm"
241
242
243 #line 248 "c:\program files\tasking\c166 v8.0\include\head.asm"
248 fbias EQU 127 ; EXCESS-127 float bias
TASKING C166/ST10 assembler v8.0r1 Build 256 SN 00096962 Date: Apr 23 2004 Time: 16:27:03 Page: 5
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LOC CODE LINE SOURCELINE
249 dbias EQU 1023 ; EXCESS-1023 double bias
250 f_dbias EQU fbias - dbias ; bias adjustment for double to single
251 ; conversion.
252 d_fbias EQU dbias - fbias ; bias adjustment for single to double
253 ; conversion.
254 fprecb EQU 24 ; # of significant bits (single)
255 dprecb EQU 53 ; # of significant bits (double)
256 ffuzz EQU 24 ;
257 dfuzz EQU 55 ;
258
259 facint_2 LIT 'R5' ; Integer accumulator MSW (long).
260 facint_0 LIT 'R4' ; Integer accumulator LSW.
261 facint LIT 'R4' ; Integer accumulator (int).
262 fptrap LIT 'R1' ; Floating trap code accumulator.
263 fpexcop LIT 'R3' ; Floating exception operation accu
264 FOS1_MAN0 LIT 'R4' ; Float operand 1 mantissa MSB's
265 FOS1_MAN0H LIT 'RH4' ;
266 FOS1_MAN0L LIT 'RL4' ;
267 FOS1_MAN2 LIT 'R5' ; Float operand 1 mantissa LSB's
268 FOS1_MAN2H LIT 'RH5' ;
269 FOS1_MAN2L LIT 'RL5' ;
270 FOS1_MAN4 LIT 'R3' ; Float operand 1 mantissa round (RH3)
271 FOS1_MAN4H LIT 'RH3' ;
272 FOS1_MAN4L LIT 'RL3' ;
273 FOS1_EXP LIT 'R1' ; Float operand 1 exponent
274 FOS1_EXPH LIT 'RH1' ;
275 FOS1_EXPL LIT 'RL1' ;
276 FOS1_SGN LIT 'R3' ; Float operand 1 sign (R3.0)
277 FOS1_SGNH LIT 'RH3' ;
278 FOS1_SGNL LIT 'RL3' ;
279 FOS2_MAN0 LIT 'R10' ; Float operand 2 mantissa MSB's
280 FOS2_MAN2 LIT 'R11' ; Float operand 2 mantissa LSB's
281 FOS2_EXP LIT 'R2' ; Float operand 2 exponent
282 FOS2_EXPH LIT 'RH2' ;
283 FOS2_EXPL LIT 'RL2' ;
284 #line 288 "c:\program files\tasking\c166 v8.0\include\head.asm"
288
289 FOS2_EXPT LIT 'R2' ; Float operand 1 temporary exponent
290 FOS2_EXPTH LIT 'RH2' ;
291 FOS2_EXPTL LIT 'RL2' ;
292
293 FOS2_SGN LIT 'R3' ; Float operand 2 sign (R3.1)
294 FOS2_SGNH LIT 'RH3' ;
295 FOS2_SGNL LIT 'RL3' ;
296 FOD1_MAN0 LIT 'R7' ; Double operand 1 mantissa
297 FOD1_MAN0H LIT 'RH7' ;
298 FOD1_MAN0L LIT 'RL7' ;
299 FOD1_MAN2 LIT 'R8' ;
300 FOD1_MAN4 LIT 'R9' ;
301 FOD1_MAN6 LIT 'R5' ;
302 FOD1_MAN8 LIT 'R3' ; Double operand 1 mantissa round (RH3)
303 FOD1_MAN8H LIT 'RH3' ;
304 FOD1_MAN8L LIT 'RL3' ;
305 FOD1_EXP LIT 'R1' ; Double operand 1 exponent
306 FOD1_EXPH LIT 'RH1' ;
TASKING C166/ST10 assembler v8.0r1 Build 256 SN 00096962 Date: Apr 23 2004 Time: 16:27:03 Page: 6
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LOC CODE LINE SOURCELINE
307 FOD1_EXPL LIT 'RL1' ;
308 FOD1_SGN LIT 'R4' ; Double operand 1 sign (R4.0)
309 FOD2_MAN0 LIT 'R6' ; Double operand 2 mantissa
310 FOD2_MAN0H LIT 'RH6' ;
311 FOD2_MAN0L LIT 'RL6' ;
312 FOD2_MAN2 LIT 'R12' ;
313 FOD2_MAN4 LIT 'R13' ;
314 FOD2_MAN6 LIT 'R14' ;
315 FOD2_EXP LIT 'R2' ; Double operand 2 exponent
316 FOD2_EXPH LIT 'RH2' ;
317 FOD2_EXPL LIT 'RL2' ;
318 #line 320 "c:\program files\tasking\c166 v8.0\include\head.asm"
320
321 FOD2_EXPT LIT 'R2' ; Double operand 2 temporary exponent
322
323 FOD2_SGN LIT 'R4' ; Double operand 2 sign (R4.1)
324
325 #line 330 "c:\program files\tasking\c166 v8.0\include\head.asm"
330 ; Watchdog timer support
331 ;
332 ; The macro SERVWDT will service the watchdog timer if support has
333 ; been enabled
334 #line 338 "c:\program files\tasking\c166 v8.0\include\head.asm"
338
339 #line 340 "c:\program files\tasking\c166 v8.0\include\head.asm"
340
341
342
343 #line 346 "c:\program files\tasking\c166 v8.0\include\head.asm"
346
347
348 ; _BFWDNOP() can be used to solve 166 problem S1
349 ; Erroneous Byte Forwarding for Internal RAM locations (only needed for old uC's).
350 ; Place 0, 1 or 2 _BFWD_NOP's after byte write instructions.
351 #line 355 "c:\program files\tasking\c166 v8.0\include\head.asm"
355
356 #line 357 "c:\program files\tasking\c166 v8.0\include\head.asm"
357
358
359
360 ; FIX_MULDIV = IEN, multiplication/division protected by "BCLR IEN"
361 ; FIX_MULDIV = ILVL, multiplication/division protected by "OR PSW, #0F000h"
362 ; FIX_MULDIV does not seem to be used!
363
364
365
366
367 ; _CPU1R006() can be used to solve 163-24D problem CPU 01.006
368 ; (CPU hangs with execution mov Rn, [Rm+#data16]).
369 ; Replace "MOV Rd, [Ri+#data16]" with "_CPU1R006( Rd, Ri, data16 )".
370 #line 376 "c:\program files\tasking\c166 v8.0\include\head.asm"
376
377 #line 379 "c:\program files\tasking\c166 v8.0\include\head.asm"
379
380
TASKING C166/ST10 assembler v8.0r1 Build 256 SN 00096962 Date: Apr 23 2004 Time: 16:27:03 Page: 7
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LOC CODE LINE SOURCELINE
381
382 ; _STBUS1() can be used to solve ST10 problem ST_BUS1
383 ; (PEC transfers and JMPS).
384 ; Replace "JMPS SEG func, SOF func" with "_STBUS1( func )".
385 ; Of course this macro only influences segmented memory models.
386 #line 394 "c:\program files\tasking\c166 v8.0\include\head.asm"
394
395 #line 397 "c:\program files\tasking\c166 v8.0\include\head.asm"
397
398
399
400 ; The macro _LONDON1 expands to an ATOMIC #2 instruction when FIX_LONDON1 is set.
401 ; otherwise _LONDON1 expands to an empty macro. This fix only applies to extended
402 ; architectures.
403 #line 407 "c:\program files\tasking\c166 v8.0\include\head.asm"
407
408 #line 409 "c:\program files\tasking\c166 v8.0\include\head.asm"
409
410
411
412 ; the macro FIX_JMPRACACHE can be used to solve Egold problem CR108400
413 ; (Program flow after not taken JMPR/JMPA can be broken).
414 ; After each unconditional JMPR or JMPA, insert an unconditional JMPR
415 ; to the instruction following it.
416 #line 420 "c:\program files\tasking\c166 v8.0\include\head.asm"
420
421 #line 422 "c:\program files\tasking\c166 v8.0\include\head.asm"
422
423
424
425 ; In the floating point code is the instruction "mulu Rx, Ry" replaced by the
426 ; macro MUI( Rx, Ry ).
427 ; Depending of the flags this can bypass many CPU errors, like:
428 ; problem7 Incorrect multiply or divide results during hold states
429 ; problem17 Interrupted multiplication in combination with higher priority
430 ; interrupt after RETI
431 ; problem28 See CPU.11
432 ; CPU.2 MUL/DIV last instruction in ATOMIC or EXTEND sequence
433 ; CPU.11 Stack underflow trap during restart of interrupted multiply
434 ; CPU.18 Interrupted multiply/divide instructions in internal Flash
435 #line 477 "c:\program files\tasking\c166 v8.0\include\head.asm"
477
478
479 ; In the floating point code is the instruction "divlu Rx" replaced by the
480 ; macro DIL( Rx, PREMDLHACCESS, POSTMDLACCESS ).
481 ; Depending of the flags this can bypass many CPU errors, like:
482 ; problem7 Incorrect multiply or divide results during hold states
483 ; CPU.2 MUL/DIV last instruction in ATOMIC or EXTEND sequence
484 ; CPU.18 Interrupted multiply/divide instructions in internal Flash
485 ; LONDON1751 DIV result in MDH/MDL can be distorted by explicit CSFR write
486 ; Remember there's a nasty CPU error (CPU.17/problem30) making the overflow
487 ; flag suspicious.
488 #line 549 "c:\program files\tasking\c166 v8.0\include\head.asm"
549
550
TASKING C166/ST10 assembler v8.0r1 Build 256 SN 00096962 Date: Apr 23 2004 Time: 16:27:03 Page: 8
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LOC CODE LINE SOURCELINE
551 ; In the floating point code is the instruction "divX Rx" replaced by the
552 ; macro DIV( INSTRUCTION, Rx, PREMDLHACCESS, POSTMDLACCESS ).
553 ; Depending of the flags this can bypass CPU errors, like:
554 ; CR105893 FIX_EXT1DIV div corrupted if interrupted by div
555 ; CR108309 FIX_EXT1MDLDIV mdl access corrupts if after div
556 ; CR108904 FIX_EXT1MDLHMULDIV PEC interrupt corrupts if div after MDL/H access
557 #line 598 "c:\program files\tasking\c166 v8.0\include\head.asm"
598
599
600 ; Macro _CALL() creates the right code for a direct/indirect function call
601 ; Macro _RET() creates the right code for function return.
602 ; These macro's are added to support _USRSTACK function call and return.
603 ; _USRSTACK code is generated if variable _USRSTACK is set, else a normal
604 ; function call and return (CALL/RET) will be generated.
605 ; Rx is a temporary register. R10 or R11 could be used for Rx without saving
606 ; and restoring the contents in it for the most cases. (R10 now best choice.)
607 ; Register R2 is used in the return stub function and in the return macro
608 ; for tiny and medium model, so operands may not be passed via register R2 !
609
610 #line 615 "c:\program files\tasking\c166 v8.0\include\head.asm"
615
616 #line 620 "c:\program files\tasking\c166 v8.0\include\head.asm"
620
621 #line 623 "c:\program files\tasking\c166 v8.0\include\head.asm"
623
624 #line 725 "c:\program files\tasking\c166 v8.0\include\head.asm"
725
726
727 ; Unpack one single precision floating point operand
728 #line 730 "c:\program files\tasking\c166 v8.0\include\head.asm"
730
731
732 ;
733 ; Unpack two single precision floating point operands
734 #line 743 "c:\program files\tasking\c166 v8.0\include\head.asm"
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