📄 lpc213x.h
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/*********************************************************************************************************
214X USB 48MHz时钟（PLL1）
*********************************************************************************************************/
#define PLL0CON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
#define PLL0CFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
#define PLL0STAT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
#define PLL0FEED (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))
#define PLL1CON (*(volatile unsigned char *)(SCB_BASE_ADDR + 0x0A0))
#define PLL1CFG (*(volatile unsigned char *)(SCB_BASE_ADDR + 0x0A4))
#define PLL1STAT (*(volatile unsigned short*)(SCB_BASE_ADDR + 0x0A8))
#define PLL1FEED (*(volatile unsigned char *)(SCB_BASE_ADDR + 0x0AC))
/*********************************************************************************************************
功率控制寄存器
*********************************************************************************************************/
#define PCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
#define PCONP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))
/*********************************************************************************************************
VLSI外设总线（VPB）分频寄存器
*********************************************************************************************************/
#define VPBDIV (*(volatile unsigned char *)(SCB_BASE_ADDR + 0x100))
/*********************************************************************************************************
外部中断控制寄存器
*********************************************************************************************************/
#define EXTINT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
#define INTWAKE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
#define EXTMODE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
#define EXTPOLAR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))
/*********************************************************************************************************
复位源识别寄存器
*********************************************************************************************************/
#define RSID (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))
/*********************************************************************************************************
代码安全寄存器
*********************************************************************************************************/
#define CSPR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184))
/*********************************************************************************************************
214x:系统控制和状态标志寄存器
*********************************************************************************************************/
#define SCS (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0))
/*********************************************************************************************************
定时器0的特殊寄存器
*********************************************************************************************************/
#define TMR0_BASE_ADDR 0xE0004000
#define T0IR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00))
#define T0TCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04))
#define T0TC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08))
#define T0PR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C))
#define T0PC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10))
#define T0MCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14))
#define T0MR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18))
#define T0MR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
#define T0MR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
#define T0MR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
#define T0CCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
#define T0CR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
#define T0CR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
#define T0CR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
#define T0CR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
#define T0EMR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
#define T0CTCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))
#define T0PWMCON (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x74))
/*********************************************************************************************************
定时器1的特殊寄存器
*********************************************************************************************************/
#define TMR1_BASE_ADDR 0xE0008000
#define T1IR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
#define T1TCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
#define T1TC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
#define T1PR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
#define T1PC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
#define T1MCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
#define T1MR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
#define T1MR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
#define T1MR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
#define T1MR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
#define T1CCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
#define T1CR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
#define T1CR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
#define T1CR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
#define T1CR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
#define T1EMR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
#define T1CTCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))
#define T1PWMCON (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x74))
/*********************************************************************************************************
定时器2的特殊寄存器
*********************************************************************************************************/
#define TMR2_BASE_ADDR 0xE0070000
#define T2IR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00))
#define T2TCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04))
#define T2TC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08))
#define T2PR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C))
#define T2PC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10))
#define T2MCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14))
#define T2MR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18))
#define T2MR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C))
#define T2MR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20))
#define T2MR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24))
#define T2CCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28))
#define T2CR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C))
#define T2CR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30))
#define T2CR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34))
#define T2CR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38))
#define T2EMR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C))
#define T2CTCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70))
#define T2PWMCON (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x74))
/*********************************************************************************************************
定时器3的特殊寄存器
**********************************************************************************************************/
#define TMR3_BASE_ADDR 0xE0074000
#define T3IR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00))
#define T3TCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04))
#define T3TC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08))
#define T3PR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C))
#define T3PC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10))
#define T3MCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14))
#define T3MR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18))
#define T3MR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C))
#define T3MR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20))
#define T3MR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24))
#define T3CCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28))
#define T3CR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C))
#define T3CR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30))
#define T3CR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34))
#define T3CR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38))
#define T3EMR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C))
#define T3CTCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70))
#define T3PWMCON (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x74))
/*********************************************************************************************************
脉宽调制器的特殊寄存器
*********************************************************************************************************/
#define PWM0_BASE_ADDR 0xE0014000
#define PWM0IR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00))
#define PWM0TCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04))
#define PWM0TC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08))
#define PWM0PR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C))
#define PWM0PC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10))
#define PWM0MCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14))
#define PWM0MR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18))
#define PWM0MR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C))
#define PWM0MR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20))
#define PWM0MR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24))
#define PWM0MR4 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40))
#define PWM0MR5 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44))
#define PWM0MR6 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48))
#define PWM0PCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C))
#define PWM0LER (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50))
/*********************************************************************************************************
通用异步串行口0(UART0)的特殊寄存器
*********************************************************************************************************/
#define UART0_BASE_ADDR 0xE000C000
#define U0RBR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
#define U0ICR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24))
#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
/*********************************************************************************************************
通用异步串行口1(UART1)的特殊寄存器
*********************************************************************************************************/
#define UART1_BASE_ADDR 0xE0010000
#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10)) /* LPC2144/6/8 */
#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18)) /* LPC2144/6/8 */
#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
/*********************************************************************************************************
芯片间总线（I2C0）的特殊寄存器
*********************************************************************************************************/
#define I2C0_BASE_ADDR 0xE001C000
#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
/*********************************************************************************************************
芯片间总线（I2C1）的特殊寄存器
*********************************************************************************************************/
#define I2C1_BASE_ADDR 0xE005C000
#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
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