lpc213x.h

philips arm7 lpc2103的常用功能的库函数第二部分

/****************************************Copyright (c)**************************************************
**                               广州周立功单片机发展有限公司
**                                     研    究    所
**                                        产品一部 
**
**                                 http://www.zlgmcu.com
**
**--------------文件信息--------------------------------------------------------------------------------
**文   件   名: LPC2138.H
**创   建   人: panyifei&lixiaocheng
**最后修改日期: 2007-04-30
**描        述: lpc213x&214x芯片的头文件
**
**--------------历史版本信息----------------------------------------------------------------------------
** 创建人: panyifei&lixiaocheng
** 版  本: V1.0
** 日　期: 2007-04-30
** 描　述: lpc213x&214x芯片的头文件
**
**--------------当前版本修订------------------------------------------------------------------------------
** 修改人: 
** 日　期:
** 描　述:
**
**--------------------------------------------------------------------------------------------------------
** Modified by:             gaolihua 
** Modified Date:		    2008-04-22
** Version:	                2.0
** Descriptions:		    增加定时器2、3的特殊寄存器地址的设置
**
*********************************************************************************************************/

#ifndef __LPC2138_H
#define __LPC2138_H

/*********************************************************************************************************
   向量中断控制器(VIC)的特殊寄存器
*********************************************************************************************************/
#define VIC_BASE_ADDR	0xFFFFF000
#define VICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
#define VICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
#define VICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
#define VICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
#define VICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
#define VICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
#define VICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
#define VICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
#define VICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
#define VICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x030))
#define VICDefVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x034))

#define VICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
#define VICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
#define VICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
#define VICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
#define VICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
#define VICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
#define VICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
#define VICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
#define VICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
#define VICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
#define VICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
#define VICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
#define VICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
#define VICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
#define VICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
#define VICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
#define VICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
#define VICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
#define VICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
#define VICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20c))
#define VICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
#define VICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
#define VICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
#define VICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21c))
#define VICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
#define VICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
#define VICVectCntl10   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
#define VICVectCntl11   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22c))
#define VICVectCntl12   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
#define VICVectCntl13   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
#define VICVectCntl14   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
#define VICVectCntl15   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23c))

/*********************************************************************************************************
   管脚连接模块控制寄存器
*********************************************************************************************************/
#define PINSEL_BASE_ADDR	0xE002C000
#define PINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
#define PINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
#define PINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))

/*********************************************************************************************************
   通用并行IO口的特殊寄存器
*********************************************************************************************************/
#define GPIO_BASE_ADDR		0xE0028000
#define IO0PIN         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
#define IO0SET         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
#define IO0DIR         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
#define IO0CLR         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
#define IO1PIN         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
#define IO1SET         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
#define IO1DIR         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
#define IO1CLR         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))

/*********************************************************************************************************
   214X:快速IO口的特殊寄存器
*********************************************************************************************************/
#define FIO_BASE_ADDR		0x3FFFC000

/*********************************************************************************************************
   字寻址的寄存器
*********************************************************************************************************/
#define FIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00))
#define FIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
#define FIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
#define FIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
#define FIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))

#define FIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20))
#define FIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
#define FIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
#define FIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
#define FIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))

/*********************************************************************************************************
   半字寻址寄存器
*********************************************************************************************************/
#define FIO0DIRL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x00))
#define FIO0DIRU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x02))
#define FIO0MASKL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x10))
#define FIO0MASKU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x12))
#define FIO0PINL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x14))
#define FIO0PINU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x16))
#define FIO0SETL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x18))
#define FIO0SETU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x1A))
#define FIO0CLRL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x1C))
#define FIO0CLRU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x1E))

#define FIO1DIRL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x20))
#define FIO1DIRU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x22))
#define FIO1MASKL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x30))
#define FIO1MASKU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x32))
#define FIO1PINL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x34))
#define FIO1PINU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x36))
#define FIO1SETL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x38))
#define FIO1SETU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x3A))
#define FIO1CLRL	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x3C))
#define FIO1CLRU	(*(volatile unsigned short*)(FIO_BASE_ADDR + 0x3E))

/*********************************************************************************************************
   字节寻址的寄存器
*********************************************************************************************************/
#define FIO0DIR0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00))
#define FIO0DIR1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01))
#define FIO0DIR2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02))
#define FIO0DIR3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03))
#define FIO0MASK0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10))
#define FIO0MASK1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11))
#define FIO0MASK2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12))
#define FIO0MASK3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13))
#define FIO0PIN0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14))
#define FIO0PIN1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15))
#define FIO0PIN2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16))
#define FIO0PIN3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17))
#define FIO0SET0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18))
#define FIO0SET1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19))
#define FIO0SET2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A))
#define FIO0SET3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B))
#define FIO0CLR0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C))
#define FIO0CLR1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D))
#define FIO0CLR2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E))
#define FIO0CLR3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F))

#define FIO1DIR0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20))
#define FIO1DIR1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
#define FIO1DIR2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22))
#define FIO1DIR3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23))
#define FIO1MASK0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30))
#define FIO1MASK1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x31))
#define FIO1MASK2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32))
#define FIO1MASK3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33))
#define FIO1PIN0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34))
#define FIO1PIN1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x35))
#define FIO1PIN2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36))
#define FIO1PIN3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37))
#define FIO1SET0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38))
#define FIO1SET1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x39))
#define FIO1SET2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A))
#define FIO1SET3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B))
#define FIO1CLR0	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C))
#define FIO1CLR1	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3D))
#define FIO1CLR2	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E))
#define FIO1CLR3	(*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F))

/*********************************************************************************************************
   系统控制寄存器基址,包括存储器映射控制、PLL、VPB分频器、功率控制,外部中断输入、复位、代码安全/调试
*********************************************************************************************************/
#define SCB_BASE_ADDR	0xE01FC000

/*********************************************************************************************************
   存储器加速模块
*********************************************************************************************************/
#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))

/*********************************************************************************************************
   PLL控制寄存器
*********************************************************************************************************/
#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))