📄 example2.lst
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__text_start:
__start:
2A E5CF LDI R28,0x5F
2B E0D4 LDI R29,4
2C BFCD OUT 0x3D,R28
2D BFDE OUT 0x3E,R29
2E 51C0 SUBI R28,0x10
2F 40D0 SBCI R29,0
30 EA0A LDI R16,0xAA
31 8308 STD Y+0,R16
32 2400 CLR R0
33 E6E0 LDI R30,0x60
34 E0F0 LDI R31,0
35 E010 LDI R17,0
36 36E0 CPI R30,0x60
37 07F1 CPC R31,R17
38 F011 BEQ 0x003B
39 9201 ST R0,Z+
3A CFFB RJMP 0x0036
3B 8300 STD Z+0,R16
3C E5E4 LDI R30,0x54
3D E0F0 LDI R31,0
3E E6A0 LDI R26,0x60
3F E0B0 LDI R27,0
40 E010 LDI R17,0
41 E000 LDI R16,0
42 BF0B OUT 0x3B,R16
43 35E4 CPI R30,0x54
44 07F1 CPC R31,R17
45 F021 BEQ 0x004A
46 95C8 LPM
47 9631 ADIW R30,1
48 920D ST R0,X+
49 CFF9 RJMP 0x0043
4A 940E 0061 CALL _main
_exit:
4C CFFF RJMP _exit
_delay:
i --> R20
j --> R22
ms --> R16
4D 940E 00D6 CALL push_xgsetF000
FILE: G:\学习\avr\天祥电子AVR视频教程\chengxu\example\example2.c
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003)
(0004) void delay(int ms)
(0005) {
(0006) int i,j;
(0007) for(i=0;i<ms;i++)
4F 2744 CLR R20
50 2755 CLR R21
51 C00A RJMP 0x005C
(0008) for(j=0;j<1141;j++);
52 2766 CLR R22
53 2777 CLR R23
54 5F6F SUBI R22,0xFF
55 4F7F SBCI R23,0xFF
56 3765 CPI R22,0x75
57 E0E4 LDI R30,4
58 077E CPC R23,R30
59 F3D4 BLT 0x0054
5A 5F4F SUBI R20,0xFF
5B 4F5F SBCI R21,0xFF
5C 1740 CP R20,R16
5D 0751 CPC R21,R17
5E F39C BLT 0x0052
5F 940C 00DB JMP pop_xgsetF000
(0009)
(0010) }
(0011) void main()
(0012) {
(0013)
(0014) DDRA=0XFF;PORTA=0X00;
_main:
l --> R22
k --> R20
61 EF8F LDI R24,0xFF
62 BB8A OUT 0x1A,R24
63 2422 CLR R2
64 BA2B OUT 0x1B,R2
(0015) DDRC=0X01;PORTC=0X01;
65 E081 LDI R24,1
66 BB84 OUT 0x14,R24
67 BB85 OUT 0x15,R24
68 C06B RJMP 0x00D4
(0016) while(1)
(0017) {
(0018) char k,l;
(0019) for(l=2;l>0;l--)
69 E062 LDI R22,2
6A C040 RJMP 0x00AB
(0020) {
(0021) for(k=0;k<8;k++)
6B 2744 CLR R20
6C C01B RJMP 0x0088
(0022) {
(0023) PORTA|=BIT(k);
6D E001 LDI R16,1
6E 2F14 MOV R17,R20
6F 940E 00E0 CALL lsl8
71 B22B IN R2,0x1B
72 2A20 OR R2,R16
73 BA2B OUT 0x1B,R2
(0024) PORTC=0X00;
74 2422 CLR R2
75 BA25 OUT 0x15,R2
(0025) delay(200);
76 EC08 LDI R16,0xC8
77 E010 LDI R17,0
78 DFD4 RCALL _delay
(0026) PORTA&=~BIT(k);
79 E001 LDI R16,1
7A 2F14 MOV R17,R20
7B 940E 00E0 CALL lsl8
7D 2E20 MOV R2,R16
7E 9420 COM R2
7F B23B IN R3,0x1B
80 2032 AND R3,R2
81 BA3B OUT 0x1B,R3
(0027) PORTC=0X01;
82 E081 LDI R24,1
83 BB85 OUT 0x15,R24
(0028) delay(200);
84 EC08 LDI R16,0xC8
85 E010 LDI R17,0
86 DFC6 RCALL _delay
87 9543 INC R20
88 3048 CPI R20,0x8
89 F318 BCS 0x006D
(0029) }
(0030) for(k=6;k>0;k--)
8A E046 LDI R20,6
8B C01B RJMP 0x00A7
(0031) {
(0032) PORTA|=BIT(k);
8C E001 LDI R16,1
8D 2F14 MOV R17,R20
8E 940E 00E0 CALL lsl8
90 B22B IN R2,0x1B
91 2A20 OR R2,R16
92 BA2B OUT 0x1B,R2
(0033) PORTC=0X00;
93 2422 CLR R2
94 BA25 OUT 0x15,R2
(0034) delay(200);
95 EC08 LDI R16,0xC8
96 E010 LDI R17,0
97 DFB5 RCALL _delay
(0035) PORTA&=~BIT(k);
98 E001 LDI R16,1
99 2F14 MOV R17,R20
9A 940E 00E0 CALL lsl8
9C 2E20 MOV R2,R16
9D 9420 COM R2
9E B23B IN R3,0x1B
9F 2032 AND R3,R2
A0 BA3B OUT 0x1B,R3
(0036) PORTC=0X01;
A1 E081 LDI R24,1
A2 BB85 OUT 0x15,R24
(0037) delay(200);
A3 EC08 LDI R16,0xC8
A4 E010 LDI R17,0
A5 DFA7 RCALL _delay
A6 954A DEC R20
A7 E080 LDI R24,0
A8 1784 CP R24,R20
A9 F310 BCS 0x008C
AA 956A DEC R22
AB E080 LDI R24,0
AC 1786 CP R24,R22
AD F408 BCC 0x00AF
AE CFBC RJMP 0x006B
(0038) }
(0039) }
(0040) PORTA=0X00;
AF 2422 CLR R2
B0 BA2B OUT 0x1B,R2
(0041)
(0042) for(k=0;k<8;k++)
B1 2744 CLR R20
B2 C01F RJMP 0x00D2
(0043) {
(0044) for(l=0;l<5;l++)
B3 2766 CLR R22
B4 C017 RJMP 0x00CC
(0045) {
(0046) PORTA|=BIT(k);
B5 E001 LDI R16,1
B6 2F14 MOV R17,R20
B7 940E 00E0 CALL lsl8
B9 B22B IN R2,0x1B
BA 2A20 OR R2,R16
BB BA2B OUT 0x1B,R2
(0047) delay(50);
BC E302 LDI R16,0x32
BD E010 LDI R17,0
BE DF8E RCALL _delay
(0048) PORTA&=~BIT(k);
BF E001 LDI R16,1
C0 2F14 MOV R17,R20
C1 940E 00E0 CALL lsl8
C3 2E20 MOV R2,R16
C4 9420 COM R2
C5 B23B IN R3,0x1B
C6 2032 AND R3,R2
C7 BA3B OUT 0x1B,R3
(0049) delay(50);
C8 E302 LDI R16,0x32
C9 E010 LDI R17,0
CA DF82 RCALL _delay
CB 9563 INC R22
CC 3065 CPI R22,5
CD F338 BCS 0x00B5
(0050) }
(0051) delay(300);
FILE: <library>
CE E20C LDI R16,0x2C
CF E011 LDI R17,1
D0 DF7C RCALL _delay
D1 9543 INC R20
D2 3048 CPI R20,0x8
D3 F2F8 BCS 0x00B3
D4 CF94 RJMP 0x0069
D5 9508 RET
push_xgsetF000:
D6 937A ST R23,-Y
D7 936A ST R22,-Y
D8 935A ST R21,-Y
D9 934A ST R20,-Y
DA 9508 RET
pop_xgsetF000:
DB 9149 LD R20,Y+
DC 9159 LD R21,Y+
DD 9169 LD R22,Y+
DE 9179 LD R23,Y+
DF 9508 RET
lsl8:
E0 2311 TST R17
E1 F019 BEQ 0x00E5
E2 0F00 LSL R16
E3 951A DEC R17
E4 CFFB RJMP lsl8
E5 9508 RET
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