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📄 lesson10.lst

📁 AVR单片机C语言编程及应用实例 适合初学者的学习研究 其中包含Atmega16中文资料及Protel部分电路图
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__text_start:
__start:
    0031 E5CF      LDI	R28,0x5F
    0032 E0D4      LDI	R29,4
    0033 BFCD      OUT	P3D,R28
    0034 BFDE      OUT	P3E,R29
    0035 51C0      SUBI	R28,0x10
    0036 40D0      SBCI	R29,0
    0037 EA0A      LDI	R16,0xAA
    0038 8308      STD	R16,0+Y
    0039 2400      CLR	R0
    003A E6E1      LDI	R30,0x61
    003B E0F0      LDI	R31,0
    003C E010      LDI	R17,0
    003D 36E2      CPI	R30,0x62
    003E 07F1      CPC	R31,R17
    003F F011      BEQ	0x0042
    0040 9201      ST	R0,Z+
    0041 CFFB      RJMP	0x003D
    0042 8300      STD	R16,0+Z
    0043 E6E0      LDI	R30,0x60
    0044 E0F0      LDI	R31,0
    0045 E6A0      LDI	R26,0x60
    0046 E0B0      LDI	R27,0
    0047 E010      LDI	R17,0
    0048 36E1      CPI	R30,0x61
    0049 07F1      CPC	R31,R17
    004A F021      BEQ	0x004F
    004B 95C8      LPM
    004C 9631      ADIW	R30,1
    004D 920D      ST	R0,X+
    004E CFF9      RJMP	0x0048
    004F 940E00AE  CALL	_main
_exit:
    0051 CFFF      RJMP	_exit
_delay:
  i                    --> R20
  j                    --> R22
  ms                   --> R16
    0052 940E00D5  CALL	push_gset2
FILE: I:\AVR视频教程\视频教程\lesson10\lesson10\lesson10.c
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003) #define  uchar unsigned char
(0004) #define  uint  unsigned int
(0005) 
(0006) #define  mclk   8000000
(0007) #pragma interrupt_handler uart_rx:12
(0008) uchar rdata,flag=0;
(0009) void delay(uint ms)
(0010) {
(0011)         uint i,j;
(0012) 	for(i=0;i<ms;i++)
    0054 2744      CLR	R20
    0055 2755      CLR	R21
    0056 C00B      RJMP	0x0062
(0013) 	   {
(0014) 	   for(j=0;j<1141;j++);
    0057 2766      CLR	R22
    0058 2777      CLR	R23
    0059 C002      RJMP	0x005C
    005A 5F6F      SUBI	R22,0xFF
    005B 4F7F      SBCI	R23,0xFF
    005C 3765      CPI	R22,0x75
    005D E0E4      LDI	R30,4
    005E 077E      CPC	R23,R30
    005F F3D0      BCS	0x005A
    0060 5F4F      SUBI	R20,0xFF
    0061 4F5F      SBCI	R21,0xFF
    0062 1740      CP	R20,R16
    0063 0751      CPC	R21,R17
    0064 F390      BCS	0x0057
(0015)        }
(0016) }
    0065 940E00DD  CALL	pop_gset2
    0067 9508      RET
_uart_init:
  baud                 --> R10
    0068 940E00D9  CALL	push_gset3
    006A 0158      MOVW	R10,R16
(0017) 
(0018) void uart_init(uint baud)
(0019) {
(0020)     UCSRB=0x00; 
    006B 2422      CLR	R2
    006C B82A      OUT	P0A,R2
(0021)    UCSRA=0x00; 		    //控制寄存器清零
    006D B82B      OUT	P0B,R2
(0022)    UCSRC=(1<<URSEL)|(0<<UPM0)|(3<<UCSZ0);   
    006E E886      LDI	R24,0x86
    006F BD80      OUT	P20,R24
(0023)                                                         //选择UCSRC,异步模式,禁止                        
(0024)                                                      //   校验,1位停止位,8位数据位
(0025)    baud=mclk/16/baud-1	;   //波特率最大为65K
    0070 0115      MOVW	R2,R10
    0071 2444      CLR	R4
    0072 2455      CLR	R5
    0073 E240      LDI	R20,0x20
    0074 EA51      LDI	R21,0xA1
    0075 E067      LDI	R22,7
    0076 E070      LDI	R23,0
    0077 925A      ST	R5,-Y
    0078 924A      ST	R4,-Y
    0079 923A      ST	R3,-Y
    007A 922A      ST	R2,-Y
    007B 018A      MOVW	R16,R20
    007C 019B      MOVW	R18,R22
    007D 940E011F  CALL	div32s
    007F E041      LDI	R20,1
    0080 E050      LDI	R21,0
    0081 E060      LDI	R22,0
    0082 E070      LDI	R23,0
    0083 0118      MOVW	R2,R16
    0084 0129      MOVW	R4,R18
    0085 1A24      SUB	R2,R20
    0086 0A35      SBC	R3,R21
    0087 0A46      SBC	R4,R22
    0088 0A57      SBC	R5,R23
    0089 0151      MOVW	R10,R2
(0026)    UBRRL=baud; 					     	  
    008A B8A9      OUT	P09,R10
(0027)    UBRRH=baud>>8; 		   //设置波特率
    008B 2C23      MOV	R2,R3
    008C 2433      CLR	R3
    008D BC20      OUT	P20,R2
(0028)    UCSRB=(1<<TXEN)|(1<<RXEN)|(1<<RXCIE); 
    008E E988      LDI	R24,0x98
    008F B98A      OUT	P0A,R24
(0029)                                                        //接收、发送使能,接收中断使能
(0030)    SREG=BIT(7);	                //全局中断开放
    0090 E880      LDI	R24,0x80
    0091 BF8F      OUT	P3F,R24
(0031)    DDRD|=0X02;	                //配置TX为输出(很重要)
    0092 9A89      SBI	P11,1
(0032) 
(0033) }
    0093 940E00E0  CALL	pop_gset3
    0095 9508      RET
(0034) void uart_sendB(uchar data)
(0035) {
(0036)    while(!(UCSRA&(BIT(UDRE)))) ;
_uart_sendB:
  data                 --> R16
    0096 9B5D      SBIS	P0B,5
    0097 CFFE      RJMP	_uart_sendB
(0037)    UDR=data;
    0098 B90C      OUT	P0C,R16
(0038)    while(!(UCSRA&(BIT(TXC))));
    0099 9B5E      SBIS	P0B,6
    009A CFFE      RJMP	0x0099
(0039)    UCSRA|=BIT(TXC);
    009B 9A5E      SBI	P0B,6
(0040) }
    009C 9508      RET
_uart_rx:
    009D 922A      ST	R2,-Y
    009E 938A      ST	R24,-Y
    009F B62F      IN	R2,P3F
    00A0 922A      ST	R2,-Y
(0041) void uart_rx()
(0042) {
(0043)     UCSRB&=~BIT(RXCIE);
    00A1 9857      CBI	P0A,7
(0044) 	rdata=UDR;
    00A2 B02C      IN	R2,P0C
    00A3 92200061  STS	R2,__idata_end
(0045) 	flag=1;
    00A5 E081      LDI	R24,1
    00A6 93800060  STS	R24,__idata_start
(0046) 	UCSRB|=BIT(RXCIE);
    00A8 9A57      SBI	P0A,7
(0047) }
    00A9 9029      LD	R2,Y+
    00AA BE2F      OUT	P3F,R2
    00AB 9189      LD	R24,Y+
    00AC 9029      LD	R2,Y+
    00AD 9518      RETI
(0048) void main()
(0049) {
(0050)     //uchar i=4;
(0051) 	//uchar j='a';
(0052)     uart_init(19200);
_main:
    00AE E000      LDI	R16,0
    00AF E41B      LDI	R17,0x4B
    00B0 DFB7      RCALL	_uart_init
    00B1 C00A      RJMP	0x00BC
(0053) 	while(1)
(0054) 	{
(0055) 	   if(flag)
    00B2 90200060  LDS	R2,__idata_start
    00B4 2022      TST	R2
    00B5 F031      BEQ	0x00BC
(0056) 	   {
(0057) 	      uart_sendB(rdata);
    00B6 91000061  LDS	R16,__idata_end
    00B8 DFDD      RCALL	_uart_sendB
(0058) 		  flag=0;
    00B9 2422      CLR	R2
    00BA 92200060  STS	R2,__idata_start
    00BC CFF5      RJMP	0x00B2
(0059) 	   }
(0060) 	}
(0061) 	
(0062) }FILE: <library>
    00BD 9508      RET
push_gset1:
    00BE 935A      ST	R21,-Y
    00BF 934A      ST	R20,-Y
    00C0 9508      RET
pop_gset1:
    00C1 E0E1      LDI	R30,1
pop:
    00C2 9149      LD	R20,Y+
    00C3 9159      LD	R21,Y+
    00C4 FDE0      SBRC	R30,0
    00C5 9508      RET
    00C6 9169      LD	R22,Y+
    00C7 9179      LD	R23,Y+
    00C8 FDE1      SBRC	R30,1
    00C9 9508      RET
    00CA 90A9      LD	R10,Y+
    00CB 90B9      LD	R11,Y+
    00CC FDE2      SBRC	R30,2
    00CD 9508      RET
    00CE 90C9      LD	R12,Y+
    00CF 90D9      LD	R13,Y+
    00D0 FDE3      SBRC	R30,3
    00D1 9508      RET
    00D2 90E9      LD	R14,Y+
    00D3 90F9      LD	R15,Y+
    00D4 9508      RET
push_gset2:
    00D5 937A      ST	R23,-Y
    00D6 936A      ST	R22,-Y
    00D7 940C00BE  JMP	push_gset1
push_gset3:
    00D9 92BA      ST	R11,-Y
    00DA 92AA      ST	R10,-Y
    00DB 940C00D5  JMP	push_gset2
pop_gset2:
    00DD E0E2      LDI	R30,2
    00DE 940C00C2  JMP	pop
pop_gset3:
    00E0 E0E4      LDI	R30,4
    00E1 940C00C2  JMP	pop
neg32:
    00E3 9500      COM	R16
    00E4 9510      COM	R17
    00E5 9520      COM	R18
    00E6 9530      COM	R19
    00E7 5F0F      SUBI	R16,0xFF
    00E8 4F1F      SBCI	R17,0xFF
    00E9 4F2F      SBCI	R18,0xFF
    00EA 4F3F      SBCI	R19,0xFF
    00EB 9508      RET
long_prolog:
    00EC 928A      ST	R8,-Y
    00ED 929A      ST	R9,-Y
    00EE 92AA      ST	R10,-Y
    00EF 92BA      ST	R11,-Y
    00F0 93EA      ST	R30,-Y
    00F1 938A      ST	R24,-Y
    00F2 939A      ST	R25,-Y
    00F3 93AA      ST	R26,-Y
    00F4 93BA      ST	R27,-Y
    00F5 8589      LDD	R24,9+Y
    00F6 859A      LDD	R25,10+Y
    00F7 85AB      LDD	R26,11+Y
    00F8 85BC      LDD	R27,12+Y
    00F9 9508      RET
long_epilog:
    00FA 91B9      LD	R27,Y+
    00FB 91A9      LD	R26,Y+
    00FC 9199      LD	R25,Y+
    00FD 9189      LD	R24,Y+
    00FE 91E9      LD	R30,Y+
    00FF 90B9      LD	R11,Y+
    0100 90A9      LD	R10,Y+
    0101 9099      LD	R9,Y+
    0102 9089      LD	R8,Y+
    0103 9624      ADIW	R28,4
    0104 9508      RET
tstzero1:
    0105 27EE      CLR	R30
    0106 2BE0      OR	R30,R16
    0107 2BE1      OR	R30,R17
    0108 2BE2      OR	R30,R18
    0109 2BE3      OR	R30,R19
    010A 9508      RET
tstzero2:
    010B 27EE      CLR	R30
    010C 2BE8      OR	R30,R24
    010D 2BE9      OR	R30,R25
    010E 2BEA      OR	R30,R26
    010F 2BEB      OR	R30,R27
    0110 9508      RET
NEGMANT2:
    0111 9580      COM	R24
    0112 9590      COM	R25
    0113 95A0      COM	R26
    0114 95B0      COM	R27
    0115 5F8F      SUBI	R24,0xFF
    0116 4F9F      SBCI	R25,0xFF
    0117 4FAF      SBCI	R26,0xFF
    0118 4FBF      SBCI	R27,0xFF
    0119 9508      RET
    011A 2D08      MOV	R16,R8
    011B 2D19      MOV	R17,R9
    011C 2D2A      MOV	R18,R10
    011D 2D3B      MOV	R19,R11
    011E 9508      RET
div32s:
    011F 940E00EC  CALL	long_prolog
    0121 D013      RCALL	SDIV
    0122 940C00FA  JMP	long_epilog
div32u:
    0124 940E00EC  CALL	long_prolog
    0126 D01B      RCALL	UDIV
    0127 940C00FA  JMP	long_epilog
mod32s:
    0129 940E00EC  CALL	long_prolog
    012B D009      RCALL	SDIV
    012C DFED      RCALL	0x011A
    012D 940C00FA  JMP	long_epilog
mod32u:
    012F 940E00EC  CALL	long_prolog
    0131 D010      RCALL	UDIV
    0132 DFE7      RCALL	0x011A
    0133 940C00FA  JMP	long_epilog
SDIV:
    0135 2333      TST	R19
    0136 F032      BMI	0x013D
    0137 23BB      TST	R27
    0138 F44A      BPL	0x0142
    0139 DFD7      RCALL	NEGMANT2
resultneg:
    013A D007      RCALL	UDIV
    013B 940C00E3  JMP	neg32
parmneg:
    013D 940E00E3  CALL	neg32
    013F 23BB      TST	R27
    0140 F7CA      BPL	0x013A
    0141 DFCF      RCALL	NEGMANT2
UDIV:
    0142 940E010B  CALL	tstzero2
    0144 F0E1      BEQ	0x0161
    0145 2488      CLR	R8
    0146 2499      CLR	R9
    0147 24AA      CLR	R10
    0148 24BB      CLR	R11
    0149 940E0105  CALL	tstzero1
    014B F0A9      BEQ	0x0161
    014C E2E0      LDI	R30,0x20
    014D 0F00      LSL	R16
    014E 1F11      ROL	R17
    014F 1F22      ROL	R18
    0150 1F33      ROL	R19
    0151 1C88      ROL	R8
    0152 1C99      ROL	R9
    0153 1CAA      ROL	R10
    0154 1CBB      ROL	R11
    0155 1688      CP	R8,R24
    0156 0699      CPC	R9,R25
    0157 06AA      CPC	R10,R26
    0158 06BB      CPC	R11,R27
    0159 F028      BCS	0x015F
    015A 1A88      SUB	R8,R24
    015B 0A99      SBC	R9,R25
    015C 0AAA      SBC	R10,R26
    015D 0ABB      SBC	R11,R27
    015E 9503      INC	R16
    015F 95EA      DEC	R30
    0160 F761      BNE	0x014D
    0161 9508      RET

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