📄 structure of device driver.htm
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5.1.1.7 The sysconfig.h Header File
</h3>
<p>
<a name="nx_id_216"></a>
The
header file
<tt>/usr/sys/include/sys/sysconfig.h</tt>
defines operation codes and data structures used by the device driver's
<tt>configure</tt>
interface.
The operation codes define the action to be
performed by the device driver's
<tt>configure</tt>
interface.
Examples of the operation types
include configure, unconfigure, and query.
This file also defines many of the constants that are shared between the
<tt>cfgmgr</tt>
framework and the drivers themselves.
Within this file also appears the definition of the
<tt>cfg_attr_t</tt>
data structure that
is passed to the driver's
<tt>configure</tt>
interface and the definition of the
<tt>cfg_subsys_attr_t</tt>
data structure that device drivers initialize.
<a name="nx_id_217"></a>
</p><p>
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut10.html#SetUpConfigureRtn">Section 6.5</a>
shows how to set up the
<tt>configure</tt>
interface.
<a name="DevDrvRegHeadFile"></a>
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</p><h3>
5.1.2 Device Register Header File
</h3>
<p>
<a name="nx_id_218"></a>
The device register header file contains any public declarations that
the device driver uses.
This file usually contains the device register offset definitions
associated with the device.
<a name="nx_id_219"></a>
A device register offset is a C #define that maps to the
register of some device.
These registers are often referred to as the device's control status
register (or CSR) addresses.
<a name="nx_id_220"></a>
The device driver writer creates the device register header file.
<a name="nx_id_221"></a>
<a name="nx_id_222"></a>
</p><p>
The following example shows the device register offest definitions contained in
a device register header file for a device driver that uses the CSR I/O
access kernel interfaces to access a device's CSR addresses.
Note that these constants map to the device registers.
</p><p>
</p><pre>/***************************************************
* Define offsets to nvram device registers *
***************************************************/
#define ENVRAM_CSR 0xc00 /* CSR */
#define ENVRAM_BAT 0xc04 /* Battery Disconnect */
#define ENVRAM_HIBASE 0xc08 /* Ext. Mem Config */
#define ENVRAM_CONFIG 0xc0c /* EISA config reg */
#define ENVRAM_ID 0xc80 /* EISA ID reg */
#define ENVRAM_CTRL 0xc84 /* EISA control */
#define ENVRAM_DMA0 0xc88 /* DMA addr reg 0 */
#define ENVRAM_DMA1 0xc8c /* DMA addr reg 1 */
</pre>
<p>
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#probeReadandWriteData">Section 7.1.9</a>
shows how the
<tt>/dev/none</tt>
driver uses the CSR I/O access kernel interfaces
<tt>read_io_port</tt>
and
<tt>write_io_port</tt>
to read from and write to the device's CSR addresses.
See
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#ReadandWriteDataDrvSpecMacros">Section 7.1.10</a>
to learn how to build your own macros based on the read and write macros
that Digital provides.
</p><p>
The device register header file for the
<tt>/dev/none</tt>
driver is called
<tt>nonereg.h</tt>.
It contains public declarations and the device register offset for
the
<tt>NONE</tt>
device.
Device drivers implemented to operate with real devices need to declare
more register offsets and more public declarations.
</p><p>
</p><p>
</p><pre><p>
</p><p>
#define DN_GETCOUNT _IOR(0,1,int) <a name="co_id_25_rtn_1"></a><a href="#co_id_25_1"><strong>[1]</strong></a>
#define DN_CLRCOUNT _IO(0,2) <a name="co_id_25_rtn_2"></a><a href="#co_id_25_2"><strong>[2]</strong></a>
</p><p>
</p><p>
#define NONE_CSR 0 <a name="co_id_25_rtn_3"></a><a href="#co_id_25_3"><strong>[3]</strong></a>
</p></pre>
<p>
</p><p>
</p><ol>
<p></p><li>
<a name="co_id_25_1"></a>
Uses the
<tt>_IOR</tt>
macro to construct an
<tt>ioctl</tt>
macro called
<tt>DN_GETCOUNT</tt>.
The
<tt>_IOR</tt>
macro defines
<tt>ioctl</tt>
types for situations where data is transferred from the kernel into
the user's buffer.
Typically, this data consists of device control or status information
returned to the application program.
<cite>Writing Device Drivers: Reference</cite>
provides reference page descriptions of the
<tt>_IO</tt>,
<tt>_IOR</tt>,
<tt>_IOW</tt>,
and
<tt>_IOWR</tt>
<tt>ioctl</tt>
macros.
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut14.html#ImplementTheioctlRoutine">Section 10.3</a>
shows how the
<tt>noneioctl</tt>
interface uses
<tt>DN_GETCOUNT</tt>.
<a href="#co_id_25_rtn_1">[Return to example]</a>
<p></p></li><li>
<a name="co_id_25_2"></a>
Uses the
<tt>_IO</tt>
macro to construct an
<tt>ioctl</tt>
macro called
<tt>DN_CLRCOUNT</tt>.
The
<tt>_IO</tt>
macro defines
<tt>ioctl</tt>
types for situations where no data is actually transferred between the
application program and the kernel.
For example, this could occur in a device control operation.
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut14.html#ImplementTheioctlRoutine">Section 10.3</a>
shows how the
<tt>noneioctl</tt>
interface uses
<tt>DN_CLRCOUNT</tt>.
<a href="#co_id_25_rtn_2">[Return to example]</a>
<p></p></li><li>
<a name="co_id_25_3"></a>
Defines the device register offset for the
<tt>NONE</tt>
device.
All real devices have registers and the offsets defining the layout of
these registers are usually defined
in the device register header file.
Although the
<tt>NONE</tt>
device is not a real device, the example shows how
a device register offset would be defined.
<p>
The
<tt>NONE_CSR</tt>
offset is a 64-bit read/write CSR/LED register.
<a href="#co_id_25_rtn_3">[Return to example]</a>
</p></li></ol><p>
<a name="BusSpecHeadFiles"></a>
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</p><h3>
5.1.3 Bus-Specific Header Files
</h3>
<p>
<a name="nx_id_223"></a>
Each bus implemented on Alpha processors and Digital UNIX
has a specific header file.
The bus-specific header files contain
<tt>#define</tt>
statements, data structure definitions, and other information associated
with a specific bus.
To write portable device drivers across multiple bus
architectures, you need to consider how to include bus-specific header
files in the include files section of your device driver.
</p><p>
The following list describes some of the bus-specific header files:
</p><ul>
<p></p><li>
<tt>/usr/sys/include/io/dec/eisa/eisa.h</tt>
<p>
Contains definitions for EISA/ISA bus support
</p><p></p></li><li>
<tt>/usr/sys/include/io/dec/pci/pci.h</tt>
<p>
Contains definitions for PCI bus support
</p><p></p></li><li>
<tt>/usr/sys/include/io/dec/tc/tc.h</tt>
<p>
Contains definitions for TURBOchannel bus support
</p></li></ul><p>
</p><p>
You include the header file for the bus that your driver
operates on.
For example, if your device driver controls a device that
connects to a controller that operates on an EISA and PCI bus,
you include the files
<tt>eisa.h</tt>
and
<tt>pci.h</tt>.
The following example shows how to include the bus-specific header files
for the EISA, ISA, PCI, and TURBOchannel buses:
</p><p>
</p><pre><br>.<br>.<br>.<br>
#include <io/dec/eisa/eisa.h> /* EISA/ISA bus */
#include <io/dec/pci/pci.h> /* PCI bus */
#include <io/dec/tc/tc.h> /* TURBOchannel bus */
<br>.<br>.<br>.<br>
</pre>
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</p><h3>
5.1.4 Include Files Section for the /dev/none Device Driver
</h3>
<p>
<a name="nx_id_224"></a>
The following example shows the include files section for the
<tt>/dev/none</tt>
device driver:
</p><p>
</p><p>
</p><pre><p>
</p><p>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/ioctl.h>
#include <sys/tty.h>
#include <sys/user.h>
#include <sys/proc.h>
#include <sys/map.h>
#include <sys/buf.h>
#include <sys/vm.h>
#include <sys/file.h>
#include <sys/uio.h>
#include <sys/types.h>
#include <sys/errno.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <sys/devio.h>
#include <hal/cpuconf.h>
#include <sys/exec.h>
#include <io/common/devdriver.h>
#include <sys/sysconfig.h>
#include <kern/kalloc.h>
#include <io/dec/tc/tc.h> <a name="co_id_27_rtn_1"></a><a href="#co_id_27_1"><strong>[1]</strong></a>
#include <machine/cpu.h>
#include <io/ESA100/nonereg.h> <a name="co_id_27_rtn_2"></a><a href="#co_id_27_2"><strong>[2]</strong></a>
</p><p>
</p><p>
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