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📁 What is this ``device driver stuff anyway? Here s a very short introduction to the concept.
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is
an I/O handle that you can use to reference a device register or memory
located in bus address space (either I/O space or memory space).
You can perform standard C mathematical operations (addition and
subtraction only) on the I/O handle.
For example, this code fragment adds the I/O handle and the
command/status register in the call to
<tt>read_io_port</tt>.
</p><p>
</p><pre><br>.<br>.<br>.<br>
#define csr 0   /* Command/Status register */
#define reg1 8  /* General register 1 */
#define reg2 16 /* General register 2 */

io_handle_t device;
<br>.<br>.<br>.<br>
device_intr()
{
      mb(); <a name="co_id_19_rtn_1"></a><a href="#co_id_19_1"><strong>[1]</strong></a>
      stat = read_io_port(device + csr, 4, 0); <a name="co_id_19_rtn_2"></a><a href="#co_id_19_2"><strong>[2]</strong></a>

       /* or */ <a name="co_id_19_rtn_3"></a><a href="#co_id_19_3"><strong>[3]</strong></a>

       mb();
       bcopy (dma_buf, data, nbytes);
}
<br>.<br>.<br>.<br>
</pre>
<p>
</p><ol>
<p></p><li>
<a name="co_id_19_1"></a>
Calls the
<tt>mb</tt>
interface to ensure that the device CSR write has completed.
<a href="#co_id_19_rtn_1">[Return to example]</a>
<p></p></li><li>
<a name="co_id_19_2"></a>
Reads the status from the device.
See
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#probeReadandWriteData">Section 7.1.9</a>
for a detailed discussion of
<tt>read_io_port</tt>.
<a href="#co_id_19_rtn_2">[Return to example]</a>
<p></p></li><li>
<a name="co_id_19_3"></a>
This sequence of code presents another way to accomplish the same thing
as the previous code.
It calls the
<tt>mb</tt>
interface to ensure that the buffer is correct.
It then gets the data from the DMA buffer by calling the
<tt>bcopy</tt>
interface.
<a href="#co_id_19_rtn_3">[Return to example]</a>
</li></ol><p>
</p><blockquote><p align="center"><font size="+1"><strong>Note</strong></font></p><p>
Digital UNIX on an Alpha system provides a memory barrier
in the interrupt
stream before calling any device interrupt handlers.
Thus, a call to
<tt>mb</tt>
is not strictly necessary in the device interrupt case.
For performance reasons in the device interrupt case, you can omit the call to
<tt>mb</tt>.
</p></blockquote><p>
<a name="BetweenWrites"></a>
</p><p></p><hr><p align="center">
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</p><p></p><hr><p>
</p><h3>
3.1.6.4牋牋Between Writes
</h3>
<p>
You call the
<tt>mb</tt>
interface between writes if you do not want a write buffer to collapse
the writes (merge bytes/shorts/ints/quads or reorder).
The call assumes that
device
is
an I/O handle that you can use to reference a device register or memory
located in bus address space (either I/O space or memory space).
You can perform standard C mathematical operations (addition and
subtraction only) on the I/O handle.
For example, this code fragment adds the I/O handle and general register 1
and general register 2 in the calls to
<tt>write_io_port</tt>.
</p><p>
</p><pre><br>.<br>.<br>.<br>
#define csr 0   /* Command/Status register */
#define reg1 8  /* General register 1 */
#define reg2 16 /* General register 2 */

io_handle_t device;
<br>.<br>.<br>.<br>
        *ptr = value; <a name="co_id_20_rtn_1"></a><a href="#co_id_20_1"><strong>[1]</strong></a>
        mb (); <a name="co_id_20_rtn_2"></a><a href="#co_id_20_2"><strong>[2]</strong></a>
        *(ptr+1) = value2; <a name="co_id_20_rtn_3"></a><a href="#co_id_20_3"><strong>[3]</strong></a>

/* or */ <a name="co_id_20_rtn_4"></a><a href="#co_id_20_4"><strong>[4]</strong></a>

        write_io_port(device + reg1, 4, 0, value);
<br>
        mb ();
        write_io_port(device + reg2, 4, 0, value2);
<br>.<br>.<br>.<br>
</pre>
<p>
</p><ol>
<p></p><li>
<a name="co_id_20_1"></a>
Writes the first location.
<a href="#co_id_20_rtn_1">[Return to example]</a>
<p></p></li><li>
<a name="co_id_20_2"></a>
Calls the
<tt>mb</tt>
interface to force a write out of the write buffer.
<a href="#co_id_20_rtn_2">[Return to example]</a>
<p></p></li><li>
<a name="co_id_20_3"></a>
Writes the second location.
<a href="#co_id_20_rtn_3">[Return to example]</a>
<p></p></li><li>
<a name="co_id_20_4"></a>
This sequence of code illustrates an example more specifically tailored
to device drivers.
Note that this use of
<tt>mb</tt>
is exactly equivalent to
<tt>wbflush</tt>.
See
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#probeReadandWriteData">Section 7.1.9</a>
for a detailed discussion of
<tt>write_io_port</tt>.
<p>
This sequence:
</p><ul>
<p></p><li>
Writes the first location by calling
<tt>write_io_port</tt>.
<p></p></li><li>
Calls
<tt>mb</tt>
to force a write out of the write buffer.
<p></p></li><li>
Writes the second location by calling
<tt>write_io_port</tt>
a second time.
</li></ul><p>
<a href="#co_id_20_rtn_4">[Return to example]</a>
</p></li></ol><p>
</p><blockquote><p align="center"><font size="+1"><strong>Note</strong></font></p><p>
The
<cite>Alpha Architecture Reference Manual</cite>
(1992 edition) has a technical error in the description of the
<tt>MB</tt>
instruction.
It specifies that
<tt>MB</tt>
is needed only on multiprocessor systems.
This statement is not accurate.
The
<tt>MB</tt>
instruction must be used in any system to guarantee correctly ordered
access to I/O registers or memory that can be accessed via off-board DMA.
All such off-board I/O and DMA engines are considered ``processors'' in
the Alpha architecture's definition of multiprocessor.
</p></blockquote><p>
<a name="BusIssues"></a>
</p><p></p><hr><p align="center">
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</p><p></p><hr><p>
</p><h2>
3.2牋牋Bus Issues That Influence Device Driver Design
</h2>
<p>
<a name="nx_id_152"></a>
Whenever possible, you should design a device driver so that it can
accommodate peripheral devices that can operate on more than one bus
architecture.
You can achieve portability across bus architectures particularly when
the bus architectures themselves exhibit common features and attributes.
For example, you should be able to write one device driver for a device
that operates on the Industry Standard Architecture (ISA) and Extended
Industry Standard Architecture (EISA) buses because their architectures
exhibit common features and attributes.
In other cases, it may not be feasible to write one device driver for
multiple bus architectures if these architectures exhibit dissimilar
features and attributes.
</p><p>
You must consider the following issues to make your drivers portable
across bus architectures.
The discussion centers around the following Digital-implemented buses:
EISA, ISA, PCI, and TURBOchannel.
However, the issues
may be applicable to other bus architectures.
</p><ul>
<p></p><li>
Bus-specific header file issues (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut8.html#BusSpecHeadFiles">Section 5.1.3</a>)
<p></p></li><li>
Bus-specific constant name issues (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut10.html#DefBusSpecNameConstinConfigure">Section 6.4</a>)
<p></p></li><li>
Bus-specific issues related to the
<tt>/etc/sysconfigtab</tt>
database (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut18.html#ThesysconfigtabFileFragment">Section 13.4</a>)
<p>
The option data associated with the bus a driver operates on is
specified through the following attribute fields in the
<tt>sysconfigtab</tt>
file fragment:
<tt>EISA_Option</tt>
(for EISA buses),
<tt>ISA_Option</tt>
(for ISA buses),
<tt>PCI_Option</tt>
(for PCI buses),
<tt>TC_Option</tt>
(for TURBOchannel buses),
and
<tt>VBA_Option</tt>
(for the VMEbus).
The
<tt>sysconfigtab</tt>
file fragment gets appended to the
<tt>/etc/sysconfigtab</tt>
database during installation of the driver product.
See the bus-specific driver book for a description of these fields.
</p><p></p></li><li>
Bus-specific issues related to implementing the 
<tt>probe</tt>
interface (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#MultipleBusIssues">Section 7.1.1</a>)
<p></p></li><li>
Bus-specific issues related to implementing the
<tt>slave</tt>
interface (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#MultipleBusIssuesSlave">Section 7.4.1</a>)
<p></p></li><li>
Bus-specific issues for implementing the
<tt>configure</tt>
interface (see
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut10.html#DefBusSpecNameConstinConfigure">Section 6.4</a>)
</li></ul><p>
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