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📁 What is this ``device driver stuff anyway? Here s a very short introduction to the concept.
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<html><head><title>Understanding CPU and Bus Issues That Influence Device Driver Design</title>

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<meta name="DESCRIPTION" content="Writing Device Drivers Tutorial: DIGITAL UNIX Version 4.0B documentation set">
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</p><h1>3牋牋Understanding CPU and Bus Issues That Influence Device Driver Design</h1>
<p>
This chapter discusses design issues related to writing device drivers
that can operate on multiple CPU and bus architectures.
The issues relate specifically to the Alpha CPU architecture and
to bus architectures that Digital implements (EISA, ISA, PCI, and
TURBOchannel).
However, these issues might be applicable to other CPU and bus
architectures.
The chapter begins with a discussion of the CPU issues that
influence device driver design and concludes with a summary of
the bus issues that you need to consider when designing your
device drivers.
<a name="CPUIssues"></a>
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</p><h2>
3.1牋牋CPU Issues That Influence Device Driver Design
</h2>
<p>
<a name="nx_id_127"></a>
Whenever possible, you should design a device driver
so that it can accommodate peripheral devices that operate on
more then one CPU architecture.
You need to consider the following issues to make your drivers portable
across CPU architectures:
</p><ul>
<p></p><li>
Control status register (CSR) access
<p></p></li><li>
I/O copy operation
<p></p></li><li>
Direct memory access (DMA) operation
<p></p></li><li>
Memory mapping
<p></p></li><li>
64-bit versus 32-bit
<p></p></li><li>
Memory barriers
</li></ul><p>
</p><p>
The discussion centers around 64-bit Alpha CPU platforms and 32-bit
CPU platforms, but the topics may be applicable to other CPU architectures. 
The following sections discuss each of these issues.
<a name="CSRAccess"></a>
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</p><h3>
3.1.1牋牋Control Status Register Issues
</h3>
<p>
<a name="nx_id_128"></a>
</p><p>
Many device drivers based on the UNIX operating system access a device's
control status register (CSR) addresses directly
through a device register structure.
This method involves declaring a device register structure that describes the
device's characteristics, which include a device's control status register.
After declaring the device register structure, the driver accesses
the device's CSR addresses through the member that maps to it.
</p><p>
There are some CPU architectures that do not allow you to access the
device CSR addresses directly.
If you want to write your device driver to operate on both types of CPU
architectures, you can write one device driver with the appropriate
conditional compilation statements.
You can also avoid the potentially confusing proliferation of
conditional compilation statements by using the CSR I/O access kernel interfaces
provided by Digital UNIX to read from and write to the device's CSR addresses.
Because the CSR I/O access interfaces are designed to be CPU
hardware independent,
their use not only simplifies the readability of the
driver, but also makes the driver more portable across different CPU
architectures and different CPU types within the same architecture.
</p><p>
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#probeReadandWriteData">Section 7.1.9</a>
shows how the
<tt>/dev/none</tt>
driver uses the CSR I/O access kernel interfaces
<tt>read_io_port</tt>
and
<tt>write_io_port</tt>
to read from and write to the device's CSR addresses.
See
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut11.html#ReadandWriteDataDrvSpecMacros">Section 7.1.10</a>
to learn how to build your own macros based on the read and write macros
that Digital provides.
</p><p>
Device drivers operating on Alpha CPUs must access the device
registers by defining device
register offsets
and passing them as arguments to the I/O access interfaces.
<a name="IOCopyOperationIssues"></a>
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</p><h3>
3.1.2牋牋I/O Copy Operation Issues
</h3>
<p>
<a name="nx_id_129"></a>
I/O copy operations can differ markedly from one device driver
to another because of the differences in CPU architectures.
Using techniques other than the generic kernel interfaces that
Digital provides for performing I/O copy operations, you would
probably not be able to write one device driver that operates on more than
one CPU architecture or more than one CPU type within the same architecture.
</p><p>
To provide portability when performing I/O
copy operations, Digital UNIX provides generic kernel interfaces to the
system-level interfaces required by device drivers to perform an I/O
copy operation. 
Because these I/O copy interfaces are designed to be CPU hardware independent,
their use makes the driver more portable across different CPU architectures
and more than one CPU type within the same architecture.
</p><p>
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut25.html#CopyBlockMemoryIOSpace">Section 18.5.1</a>
shows you how to call these I/O copy operation interfaces. 
<a name="DMAOperationIssues"></a>
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</p><h3>
3.1.3牋牋Direct Memory Access Operation Issues
</h3>
<p>
<a name="nx_id_130"></a>
Direct memory access (DMA) operations can differ markedly from one device
driver to another because of the DMA hardware support features for
buses on Alpha systems and because of the diversity of the buses
themselves.
Using the current techniques for performing DMA, you would probably not
be able to write one device driver that operates on more than one
CPU architecture or more than one CPU type within the
same architecture.
</p><p>
To provide portability with regard to DMA operations,
Digital UNIX provides generic kernel interfaces to the system-level
interfaces required by device drivers to perform a DMA operation. 
These generic interfaces are typically called ``mapping interfaces.''
This is because their historical background is to acquire the hardware
and software resources needed to map contiguous I/O bus addresses and
accesses into discontiguous system memory addresses and accesses.
Because these interfaces are designed to be CPU hardware independent,
their use makes the driver more portable across different CPU
architectures and more than one CPU type within the same architecture.
</p><p>
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut25.html#DMARelatedInter">Section 18.6</a>
shows you how to use these mapping interfaces to achieve device driver
portability across different CPU architectures.
<a name="MemMapIssues"></a>
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</p><h3>
3.1.4牋牋Memory Mapping Issues
</h3>
<p>
<a name="nx_id_131"></a>
Many device drivers based on the UNIX operating system provide a memory
map section to handle applications that make use of the
<tt>mmap</tt>
system call.
An application calls
<tt>mmap</tt>
to map a character device's memory into user address space.
Some CPU architectures, including the Alpha architecture,
do not support an application's
use of the
<tt>mmap</tt>
system call.
If your device driver operates only on CPUs that support the
<tt>mmap</tt>
feature, you can continue writing a memory map section.
If, however, you want the device driver to operate on CPUs that do not
support the
<tt>mmap</tt>
feature, you should design the device driver so that it uses something
other than a memory map section. 
<a name="64bitversus32bitIssues"></a>
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</p><h3>
3.1.5牋牋32-Bit Versus 64-Bit Issues
</h3>
<p>
<a name="nx_id_132"></a>
This section describes issues related to declaring data types
for 32-bit and 64-bit CPU architectures.
By paying careful attention to data types, you can make your device
drivers work on both 32-bit and 64-bit systems.
<a href="http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/HTML/AA-PUBVD-TE_html/drivertut6.html#CompDataTypes">Table 3-1</a>
lists the C compiler data types and bit sizes for 32-bit CPUs
and the Alpha 64-bit CPUs.
</p><p>
<a name="CompDataTypes"></a>
</p><h3>
Table 3-1: C Compiler Data Types and Bit Sizes
</h3>
<a name="nx_id_133"></a>
<table border="4" cellpadding="4">
<tbody><tr>
<td align="left" valign="top">
<strong>
C Type
</strong>
</td>
<td align="left" valign="top">
<strong>
32-Bit Data Size
</strong>
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