bf5xx_nand.c

基于linux-2.6.28的mtd驱动

	for (i = 0; i < len; i++)
		p[i] = bfin_read_NFC_READ();
}

static void bf5xx_nand_write_buf16(struct mtd_info *mtd,
				const uint8_t *buf, int len)
{
	int i;
	u16 *p = (u16 *) buf;
	len >>= 1;

	for (i = 0; i < len; i++)
		bfin_write_NFC_DATA_WR(p[i]);

	SSYNC();
}

/*
 * DMA functions for buffer writing and reading
 */
static irqreturn_t bf5xx_nand_dma_irq(int irq, void *dev_id)
{
	struct bf5xx_nand_info *info = dev_id;

	clear_dma_irqstat(CH_NFC);
	disable_dma(CH_NFC);
	complete(&info->dma_completion);

	return IRQ_HANDLED;
}

static int bf5xx_nand_dma_rw(struct mtd_info *mtd,
				uint8_t *buf, int is_read)
{
	struct bf5xx_nand_info *info = mtd_to_nand_info(mtd);
	struct bf5xx_nand_platform *plat = info->platform;
	unsigned short page_size = (plat->page_size ? 512 : 256);
	unsigned short val;

	dev_dbg(info->device, " mtd->%p, buf->%p, is_read %d\n",
			mtd, buf, is_read);

	/*
	 * Before starting a dma transfer, be sure to invalidate/flush
	 * the cache over the address range of your DMA buffer to
	 * prevent cache coherency problems. Otherwise very subtle bugs
	 * can be introduced to your driver.
	 */
	if (is_read)
		invalidate_dcache_range((unsigned int)buf,
				(unsigned int)(buf + page_size));
	else
		flush_dcache_range((unsigned int)buf,
				(unsigned int)(buf + page_size));

	/*
	 * This register must be written before each page is
	 * transferred to generate the correct ECC register
	 * values.
	 */
	bfin_write_NFC_RST(0x1);
	SSYNC();

	disable_dma(CH_NFC);
	clear_dma_irqstat(CH_NFC);

	/* setup DMA register with Blackfin DMA API */
	set_dma_config(CH_NFC, 0x0);
	set_dma_start_addr(CH_NFC, (unsigned long) buf);
	set_dma_x_count(CH_NFC, (page_size >> 2));
	set_dma_x_modify(CH_NFC, 4);

	/* setup write or read operation */
	val = DI_EN | WDSIZE_32;
	if (is_read)
		val |= WNR;
	set_dma_config(CH_NFC, val);
	enable_dma(CH_NFC);

	/* Start PAGE read/write operation */
	if (is_read)
		bfin_write_NFC_PGCTL(0x1);
	else
		bfin_write_NFC_PGCTL(0x2);
	wait_for_completion(&info->dma_completion);

	return 0;
}

static void bf5xx_nand_dma_read_buf(struct mtd_info *mtd,
					uint8_t *buf, int len)
{
	struct bf5xx_nand_info *info = mtd_to_nand_info(mtd);
	struct bf5xx_nand_platform *plat = info->platform;
	unsigned short page_size = (plat->page_size ? 512 : 256);

	dev_dbg(info->device, "mtd->%p, buf->%p, int %d\n", mtd, buf, len);

	if (len == page_size)
		bf5xx_nand_dma_rw(mtd, buf, 1);
	else
		bf5xx_nand_read_buf(mtd, buf, len);
}

static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd,
				const uint8_t *buf, int len)
{
	struct bf5xx_nand_info *info = mtd_to_nand_info(mtd);
	struct bf5xx_nand_platform *plat = info->platform;
	unsigned short page_size = (plat->page_size ? 512 : 256);

	dev_dbg(info->device, "mtd->%p, buf->%p, len %d\n", mtd, buf, len);

	if (len == page_size)
		bf5xx_nand_dma_rw(mtd, (uint8_t *)buf, 0);
	else
		bf5xx_nand_write_buf(mtd, buf, len);
}

/*
 * System initialization functions
 */
static int bf5xx_nand_dma_init(struct bf5xx_nand_info *info)
{
	int ret;
	unsigned short val;

	/* Do not use dma */
	if (!hardware_ecc)
		return 0;

	init_completion(&info->dma_completion);

#ifdef CONFIG_BF54x
	/* Setup DMAC1 channel mux for NFC which shared with SDH */
	val = bfin_read_DMAC1_PERIMUX();
	val &= 0xFFFE;
	bfin_write_DMAC1_PERIMUX(val);
	SSYNC();
#endif
	/* Request NFC DMA channel */
	ret = request_dma(CH_NFC, "BF5XX NFC driver");
	if (ret < 0) {
		dev_err(info->device, " unable to get DMA channel\n");
		return ret;
	}

	set_dma_callback(CH_NFC, (void *) bf5xx_nand_dma_irq, (void *) info);

	/* Turn off the DMA channel first */
	disable_dma(CH_NFC);
	return 0;
}

static void bf5xx_nand_dma_remove(struct bf5xx_nand_info *info)
{
	/* Free NFC DMA channel */
	if (hardware_ecc)
		free_dma(CH_NFC);
}

/*
 * BF5XX NFC hardware initialization
 *  - pin mux setup
 *  - clear interrupt status
 */
static int bf5xx_nand_hw_init(struct bf5xx_nand_info *info)
{
	int err = 0;
	unsigned short val;
	struct bf5xx_nand_platform *plat = info->platform;

	/* setup NFC_CTL register */
	dev_info(info->device,
		"page_size=%d, data_width=%d, wr_dly=%d, rd_dly=%d\n",
		(plat->page_size ? 512 : 256),
		(plat->data_width ? 16 : 8),
		plat->wr_dly, plat->rd_dly);

	val = (plat->page_size << NFC_PG_SIZE_OFFSET) |
		(plat->data_width << NFC_NWIDTH_OFFSET) |
		(plat->rd_dly << NFC_RDDLY_OFFSET) |
		(plat->rd_dly << NFC_WRDLY_OFFSET);
	dev_dbg(info->device, "NFC_CTL is 0x%04x\n", val);

	bfin_write_NFC_CTL(val);
	SSYNC();

	/* clear interrupt status */
	bfin_write_NFC_IRQMASK(0x0);
	SSYNC();
	val = bfin_read_NFC_IRQSTAT();
	bfin_write_NFC_IRQSTAT(val);
	SSYNC();

	/* DMA initialization  */
	if (bf5xx_nand_dma_init(info))
		err = -ENXIO;

	return err;
}

/*
 * Device management interface
 */
static int bf5xx_nand_add_partition(struct bf5xx_nand_info *info)
{
	struct mtd_info *mtd = &info->mtd;

#ifdef CONFIG_MTD_PARTITIONS
	struct mtd_partition *parts = info->platform->partitions;
	int nr = info->platform->nr_partitions;

	return add_mtd_partitions(mtd, parts, nr);
#else
	return add_mtd_device(mtd);
#endif
}

static int __devexit bf5xx_nand_remove(struct platform_device *pdev)
{
	struct bf5xx_nand_info *info = to_nand_info(pdev);
	struct mtd_info *mtd = NULL;

	platform_set_drvdata(pdev, NULL);

	/* first thing we need to do is release all our mtds
	 * and their partitions, then go through freeing the
	 * resources used
	 */
	mtd = &info->mtd;
	if (mtd) {
		nand_release(mtd);
		kfree(mtd);
	}

	peripheral_free_list(bfin_nfc_pin_req);
	bf5xx_nand_dma_remove(info);

	/* free the common resources */
	kfree(info);

	return 0;
}

/*
 * bf5xx_nand_probe
 *
 * called by device layer when it finds a device matching
 * one our driver can handled. This code checks to see if
 * it can allocate all necessary resources then calls the
 * nand layer to look for devices
 */
static int __devinit bf5xx_nand_probe(struct platform_device *pdev)
{
	struct bf5xx_nand_platform *plat = to_nand_plat(pdev);
	struct bf5xx_nand_info *info = NULL;
	struct nand_chip *chip = NULL;
	struct mtd_info *mtd = NULL;
	int err = 0;

	dev_dbg(&pdev->dev, "(%p)\n", pdev);

	if (!plat) {
		dev_err(&pdev->dev, "no platform specific information\n");
		return -EINVAL;
	}

	if (peripheral_request_list(bfin_nfc_pin_req, DRV_NAME)) {
		dev_err(&pdev->dev, "requesting Peripherals failed\n");
		return -EFAULT;
	}

	info = kzalloc(sizeof(*info), GFP_KERNEL);
	if (info == NULL) {
		dev_err(&pdev->dev, "no memory for flash info\n");
		err = -ENOMEM;
		goto out_err_kzalloc;
	}

	platform_set_drvdata(pdev, info);

	spin_lock_init(&info->controller.lock);
	init_waitqueue_head(&info->controller.wq);

	info->device     = &pdev->dev;
	info->platform   = plat;

	/* initialise chip data struct */
	chip = &info->chip;

	if (plat->data_width)
		chip->options |= NAND_BUSWIDTH_16;

	chip->options |= NAND_CACHEPRG | NAND_SKIP_BBTSCAN;

	chip->read_buf = (plat->data_width) ?
		bf5xx_nand_read_buf16 : bf5xx_nand_read_buf;
	chip->write_buf = (plat->data_width) ?
		bf5xx_nand_write_buf16 : bf5xx_nand_write_buf;

	chip->read_byte    = bf5xx_nand_read_byte;

	chip->cmd_ctrl     = bf5xx_nand_hwcontrol;
	chip->dev_ready    = bf5xx_nand_devready;

	chip->priv	   = &info->mtd;
	chip->controller   = &info->controller;

	chip->IO_ADDR_R    = (void __iomem *) NFC_READ;
	chip->IO_ADDR_W    = (void __iomem *) NFC_DATA_WR;

	chip->chip_delay   = 0;

	/* initialise mtd info data struct */
	mtd 		= &info->mtd;
	mtd->priv	= chip;
	mtd->owner	= THIS_MODULE;

	/* initialise the hardware */
	err = bf5xx_nand_hw_init(info);
	if (err)
		goto out_err_hw_init;

	/* setup hardware ECC data struct */
	if (hardware_ecc) {
#ifdef CONFIG_MTD_NAND_BF5XX_BOOTROM_ECC
		chip->badblock_pattern = &bootrom_bbt;
		chip->ecc.layout = &bootrom_ecclayout;
#endif

		if (plat->page_size == NFC_PG_SIZE_256) {
			chip->ecc.bytes = 3;
			chip->ecc.size = 256;
		} else if (plat->page_size == NFC_PG_SIZE_512) {
			chip->ecc.bytes = 6;
			chip->ecc.size = 512;
		}

		chip->read_buf      = bf5xx_nand_dma_read_buf;
		chip->write_buf     = bf5xx_nand_dma_write_buf;
		chip->ecc.calculate = bf5xx_nand_calculate_ecc;
		chip->ecc.correct   = bf5xx_nand_correct_data;
		chip->ecc.mode	    = NAND_ECC_HW;
		chip->ecc.hwctl	    = bf5xx_nand_enable_hwecc;
	} else {
		chip->ecc.mode	    = NAND_ECC_SOFT;
	}

	/* scan hardware nand chip and setup mtd info data struct */
	if (nand_scan(mtd, 1)) {
		err = -ENXIO;
		goto out_err_nand_scan;
	}

	/* add NAND partition */
	bf5xx_nand_add_partition(info);

	dev_dbg(&pdev->dev, "initialised ok\n");
	return 0;

out_err_nand_scan:
	bf5xx_nand_dma_remove(info);
out_err_hw_init:
	platform_set_drvdata(pdev, NULL);
	kfree(info);
out_err_kzalloc:
	peripheral_free_list(bfin_nfc_pin_req);

	return err;
}

/* PM Support */
#ifdef CONFIG_PM

static int bf5xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
{
	struct bf5xx_nand_info *info = platform_get_drvdata(dev);

	return 0;
}

static int bf5xx_nand_resume(struct platform_device *dev)
{
	struct bf5xx_nand_info *info = platform_get_drvdata(dev);

	return 0;
}

#else
#define bf5xx_nand_suspend NULL
#define bf5xx_nand_resume NULL
#endif

/* driver device registration */
static struct platform_driver bf5xx_nand_driver = {
	.probe		= bf5xx_nand_probe,
	.remove		= __devexit_p(bf5xx_nand_remove),
	.suspend	= bf5xx_nand_suspend,
	.resume		= bf5xx_nand_resume,
	.driver		= {
		.name	= DRV_NAME,
		.owner	= THIS_MODULE,
	},
};

static int __init bf5xx_nand_init(void)
{
	printk(KERN_INFO "%s, Version %s (c) 2007 Analog Devices, Inc.\n",
		DRV_DESC, DRV_VERSION);

	return platform_driver_register(&bf5xx_nand_driver);
}

static void __exit bf5xx_nand_exit(void)
{
	platform_driver_unregister(&bf5xx_nand_driver);
}

module_init(bf5xx_nand_init);
module_exit(bf5xx_nand_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR(DRV_AUTHOR);
MODULE_DESCRIPTION(DRV_DESC);
MODULE_ALIAS("platform:" DRV_NAME);