📄 top_zoumigong.twr
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Release 7.1i Trace H.38
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
C:/Xilinx/bin/nt/trce.exe -ise d:\asic,
Design file: top_zoumigong.ncd
Physical constraint file: top_zoumigong.pcf
Device,speed: xc3s400,-5 (ADVANCED 1.35 2005-01-22)
Report level: error report
Environment Variable Effect
-------------------- ------
NONE No environment variables were set
--------------------------------------------------------------------------------
INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)
Setup/Hold to clock clock_50Mhz
------------+------------+------------+------------------+--------+
| Setup to | Hold to | | Clock |
Source | clk (edge) | clk (edge) |Internal Clock(s) | Phase |
------------+------------+------------+------------------+--------+
reset | 4.282(R)| -1.206(R)|clock_50Mhz_BUFGP | 0.000|
------------+------------+------------+------------------+--------+
Clock to Setup on destination clock clock_50Mhz
---------------+---------+---------+---------+---------+
| Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clock_50Mhz | 14.325| | | |
---------------+---------+---------+---------+---------+
Analysis completed Wed May 13 08:57:31 2009
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Peak Memory Usage: 93 MB
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