kitleth.c

LP1071 无线局域网卡WinCE驱动程序

//-----------------------------------------------------------------------------
//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//-----------------------------------------------------------------------------
//
// Copyright (C) 2004-2006,2007 Freescale Semiconductor, Inc. All Rights Reserved.
// THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
// AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//-----------------------------------------------------------------------------
//
// File: kitleth.c
//
// BSP-specific support for Ethernet KITL.
//
//-----------------------------------------------------------------------------
#include "bsp.h"

//------------------------------------------------------------------------------
// Externs
extern PCSP_GPIO_REGS g_pGPIO;
extern PCSP_PBC_REGS  g_pPBC;

//-----------------------------------------------------------------------------
// Local Variables

//------------------------------------------------------------------------------
//
//  Function:  OALKitlInitEthIrq
//
//  This function is called by OAL_KITLETH_INIT function to configure
//  the IRQ line for the Ethernet controller.
//
//  Parameters:
//      None.
//
//  Returns:
//      TRUE if successful, otherwise returns FALSE.
//
//------------------------------------------------------------------------------
BOOL OALKitlInitEthIrq(void)
{
    return TRUE;
}

//------------------------------------------------------------------------------
//
//  Function:  OALKitlClearEthIrq
//
//  This function is called by OAL_KITLETH_GET_FRAME function to clear
//  the IRQ from the Ethernet controller.
//
//  Parameters:
//      None.
//
//  Returns:
//      None.
//
//------------------------------------------------------------------------------
void OALKitlClearEthIrq(void)
{
    // Clear the GPIO IRQ status
    SETREG32(&g_pGPIO->PORT[BSP_PBC_GPIO_PORT].ISR,(1 << BSP_PBC_GPIO_PIN));
}

//------------------------------------------------------------------------------
//
//  Function:  OALKitlGetFECDmaBuffer(void)
//
//  This function is called by FEC debug functions to get
//  the physical memory for FEC DMA.
//
//  Parameters:
//      None.
//
//  Returns:
//      Physical address of the buffer used for FEC DMA
//
//------------------------------------------------------------------------------
DWORD OALKitlGetFECDmaBuffer(void)
{
    return IMAGE_BOOT_FEC_RAM_PA_START;
}

//------------------------------------------------------------------------------
//
//  Function:  OALKitlFECBSPInit(void)
//
//  This function is called by FEC debug functions to initialize FEC CPLD and GPIO
//
//  Parameters:
//      None.
//
//  Returns:
//      None
//
//------------------------------------------------------------------------------

void OALKitlFECBSPInit(void)
{
    // set ATA_FEC_EN and ATA_FEC_SEL
    OUTREG16(&g_pPBC->BCTRL2_CLEAR, CSP_BITFMASK(PBC_BCTRL2_ATA_FEC_EN));
    OUTREG16(&g_pPBC->BCTRL2_SET,   CSP_BITFMASK(PBC_BCTRL2_ATA_FEC_SEL));

    // enable gpio for FEC hardware
    // OAL_IOMUX_MIN_PIN(pGPIO, port, pin, dest);
    // OAL_IOMUX_MOUT_PIN(pGPIO, port, pin, src);
    // OAL_IOMUX_ALT_PIN(pGPIO, port, pin)
    OAL_IOMUX_ALT_PIN(g_pGPIO, GPIO_PORT_D, 8);    //PD 8 ALT

    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 15, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 14, GPIO_INPUT_DEST_AOUT);	
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 13, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 12, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 11, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 10, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 7, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 6, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 5, GPIO_INPUT_DEST_AOUT);
    OAL_IOMUX_MIN_PIN(g_pGPIO, GPIO_PORT_D, 4, GPIO_INPUT_DEST_AOUT);

    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_F, 23, GPIO_OUTPUT_SOURCE_AIN);    //PF 23 
    
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 16, GPIO_OUTPUT_SOURCE_AIN);    //PD0-3 9 16 AIN
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 9, GPIO_OUTPUT_SOURCE_AIN);
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 3, GPIO_OUTPUT_SOURCE_AIN);
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 2, GPIO_OUTPUT_SOURCE_AIN);
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 1, GPIO_OUTPUT_SOURCE_AIN);
    OAL_IOMUX_MOUT_PIN(g_pGPIO, GPIO_PORT_D, 0, GPIO_OUTPUT_SOURCE_AIN);

    //Pull Down PD5,8,16 PE23
    CLRREG32(&g_pGPIO->PORT[GPIO_PORT_D].PUEN,   GPIO_PIN_MASK(5));
    CLRREG32(&g_pGPIO->PORT[GPIO_PORT_D].PUEN,   GPIO_PIN_MASK(8));
    CLRREG32(&g_pGPIO->PORT[GPIO_PORT_D].PUEN,   GPIO_PIN_MASK(16));
    CLRREG32(&g_pGPIO->PORT[GPIO_PORT_E].PUEN,   GPIO_PIN_MASK(23));
}