viterbi_block_tb.vhd.bak

来自「这是一个计算维特比译码的程序」· BAK 代码 · 共 1,622 行 · 第 1/5 页

BAK
1,622 行
字号
12345
        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"10"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"2d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2e"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"36"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"00"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"39"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"10"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0e"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"2f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"08"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"08"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"33"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0b"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"39"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"00"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"34"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"32"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"28"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0e"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"30"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"18"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"33"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"34"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0e"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"39"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"05"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"13"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"14"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"2a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"26"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"33"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"34"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"2d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"33"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"32"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"31"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"08"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3e"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0b"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"08"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"39"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0c"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"04"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"06"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"37"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"15"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"28"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3c"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"3f"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"33"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"00"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"0f"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"32"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"07"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"09"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"32"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"39"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3a"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"3d"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"01"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"0a"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"03"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"38"))(5 DOWNTO 0)),      (        to_stdlogicvector(bit_vector'(X"02"))(5 DOWNTO 0),        to_stdlogicvector(bit_vector'(X"35"))(5 DOWNTO 0
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viterbi_block_tb.vhd.bak - 源码说明

本页面展示了「这是一个计算维特比译码的程序」中的 viterbi_block_tb.vhd.bak 源码文件，采用 BAK 编程语言编写，共 1,622 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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