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📄 twototen.map.qmsg

📁 十进制转换二进制并加减可以适用于温度调控等等
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 10 10:40:19 2009 " "Info: Processing started: Tue Mar 10 10:40:19 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off twototen -c twototen " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off twototen -c twototen" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "twototen.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file twototen.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 twototen-zh " "Info: Found design unit 1: twototen-zh" {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 twototen " "Info: Found entity 1: twototen" {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "twototen " "Info: Elaborating entity \"twototen\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "out1 twototen.vhd(79) " "Warning (10631): VHDL Process Statement warning at twototen.vhd(79): signal or variable \"out1\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"out1\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 79 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: signal or variable \"%1!s!\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"%1!s!\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "out2 twototen.vhd(89) " "Warning (10631): VHDL Process Statement warning at twototen.vhd(89): signal or variable \"out2\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"out2\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 89 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: signal or variable \"%1!s!\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"%1!s!\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "out3 twototen.vhd(126) " "Warning (10631): VHDL Process Statement warning at twototen.vhd(126): signal or variable \"out3\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"out3\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 126 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: signal or variable \"%1!s!\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"%1!s!\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "out1\[0\] GND " "Warning: Pin \"out1\[0\]\" stuck at GND" {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 79 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "out1\[4\] VCC " "Warning: Pin \"out1\[4\]\" stuck at VCC" {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 79 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "out1\[5\] VCC " "Warning: Pin \"out1\[5\]\" stuck at VCC" {  } { { "twototen.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/twototen/twototen.vhd" 79 -1 0 } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "237 " "Info: Implemented 237 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "8 " "Info: Implemented 8 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "21 " "Info: Implemented 21 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "208 " "Info: Implemented 208 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 7 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 7 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 10 10:40:28 2009 " "Info: Processing ended: Tue Mar 10 10:40:28 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}

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