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📄 circular_64x.asm

📁 DSP芯片自检测程序
💻 ASM
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;/****************************************************************************\
; *           Copyright (C) 2000 Texas Instruments Incorporated.             *
; *                           All Rights Reserved                            *
; *                                                                          *
; * GENERAL DISCLAIMER                                                       *
; * ------------------                                                       *
; * All software and related documentation is provided "AS IS" and without   *
; * warranty or support of any kind and Texas Instruments expressly disclaims*
; * all other warranties, express or implied, including, but not limited to, *
; * the implied warranties of merchantability and fitness for a particular   *
; * purpose.  Under no circumstances shall Texas Instruments be liable for   *
; * any incidental, special or consequential damages that result from the    *
; * use or inability to use the software or related documentation, even if   *
; * Texas Instruments has been advised of the liability.                     *
;\****************************************************************************/

;This routine checks the circular addressing


		.ref _Inst_Test     ;system initialization section
		.ref main_shell ;the main control shell that calls 
				;all the subroutines
		.def cir        ;THIS TEST ROUTINE


		.sect   "circhk"

;ARGUMENTS PASSED TO THIS ROUTINE
;A4 = 0FFFFh
;B4 = 5454h 
;A6 = 5151h
;B6 = 3333h
;A8 = AAAAh
;B8 = 2222h
;A10 = FFFFFFFFh
;B10 = 00000003h

cir:

;saving (or pushing) appropriate registers onto the stack

		STW     .D2     A10, *B15--[1]  ;decrementing SP
		STW     .D2     B10, *B15--[1]  ;coping variables

;*********************************************************
;* This routine will use instruction ADDA to perform     *
;* different operation with a register that has circular *
;* addressing mode enabled.                              *
;*                                                       * 
;* It will also use LD to see whether we can get the     *
;* right value when we wrap around.                      *
;*********************************************************
;* local variables - EXPECTED RESULTS (should match with *
;* the routine result)                                   *
;*********************************************************
		MVKL    .S2     0103h, B0       ;B0 = 00000103h
		MVKL    .S2     0106h, B1       ;B1 = 00000106h

;preliminary setup for the test routine
		MVKL     .S1     0Bh, A2         ;A2 = 0000000Bh
		MVKL     .S1     0100h, A5       ;A5 = 00000100h
		MVKL     .S2     00020004h, B9   ;B9 = 00000004h
		MVKH    .S2     00020004h, B9   ;B9 = 00020004h

;setting A5 for circular addressing mode with size = 8 using BK0
		MVC     .S2     B9, AMR         ;AMR = B9
		ADDAB   .D1     A5, A2, A2      ;A2 = 00000103h
		CMPEQ   .L2x    B0, A2, B0      ;B0 = 1, if B0 = A2
		SUB     .L2     B0, 1, B0       ;B0 = B0 - 1 = 0
	[B0]    B       .S2     ERRCIR1         ;ERROR, if B0 != 0
		NOP     2

		ADDAH   .D1     A5, A2, A7      ;A7 = 00000106h
		CMPEQ   .L2x    B1, A7, B1      ;B1 = 1, if A7 = B1
		SUB     .L2     B1, 1, B1       ;B1 = B1 - 1 = 0
	[B1]    B       .S2     ERRCIR2         ;ERROR, if B1 != 0
		NOP     5                       ;COULD HAVE FILLED
						;DELAY SLOTS WITH
						;USEFUL INSTRUCTIONS
;checking ADDAW with circular mode
		MVKL     .S1     00020000h, A5   ;A5 = 00020000h
		MVKH    .S1     00020000h, A5   ;A5 = 00020000h
		ADDAW   .D1     A5, 2, A9       ;A9 = 00020000h
		CMPEQ   .L1     A9, A5, A2      ;A2 = 1, if A9 = A5
		SUB     .L1     A2, 1, A2       ;A2 = A2 - 1 = 0
	[A2]    B       .S2     ERRCIR3         ;ERROR, if A2 != 0
		NOP     5               

;*************************************
;* Using LD(B)(H)(W) to check whether*
;* the right value is loaded after   *
;* wrap around.                      *
;*************************************
;A5 is in circular addressing and the
;start address is 80000100h and the 
;block size is 8 words or 32 bytes using
;BK0 field. BK1 can also be used the 
;same way.

		MVKL     .S1     0x000C0000, A5   ;START ADDR for CIR BUF
		MVKH    .S1      0x000C0000, A5   ;placed in ID_RAM
		MVKL     .S2     00040004h, B9   ;B9 = 00000004h
		MVKH    .S2     00040004h, B9   ;B9 = 00040004h
		MVC     .S2     B9, AMR         ;B9 copied into AMR
		MVKL     .S2     0x000C0000, B2  ;B2 = FFFFBEEFh
		MVKH    .S2     0x000C0000, B2  ;B2 = BEEFBEEFh

;******************************************************************
;* Storing known values into the circular buffer with A5 as the   *
;* pointer to it. A5 is in circular mode so it should be able to  *
;* read values and when the increment/decrement is greater than   *
;* the block size then it SHOULD wrap around for proper execution *
;******************************************************************
;B2 = BEEFBEEFh
;A10 = FFFFFFFFh
		STW     .D1     B2, *A5         ;A5[0] = BEEFBEEFh
		STW     .D1     B2, *+A5[1]     ;A5[1] = BEEFBEEFh
		STW     .D1     B2, *+A5[2]     ;A5[2] = BEEFBEEFh
		STW     .D1     A10, *+A5[3]    ;A5[3] = FFFFFFFFh
		STW     .D1     B2, *+A5[4]     ;A5[4] = BEEFBEEFh
		STW     .D1     B2, *+A5[5]     ;A5[5] = BEEFBEEFh
		STW     .D1     B2, *+A5[6]     ;A5[6] = BEEFBEEFh
		STW     .D1     B2, *+A5[7]     ;A5[7] = BEEFBEEFh

		LDW     .D1     *++A5[5], B1    ;B1 = BEEFBEEFh
		NOP     4
		CMPEQ   .L2     B1, B2, B1      ;B1 = 1, if B1 = B2
		SUB     .L2     B1, 1, B1       ;B1 = 0
	[!B1]   LDW     .D1     *++A5[6], B1    ;if B1 = 0, then incr.
		NOP     4                       ;A5 by 6 and put in B1
		CMPEQ   .L2x    A10, B1, B1     ;B1 = 1, if B1 = A10
		SUB     .L2     B1, 1, B1       ;B1 = 0
	[B1]    B       .S2     ERRCIR4         ;ERROR, if B1 != 0
		NOP     5

;checking for wrap around when decrementing
		LDW     .D1     *--A5[3], B1    ;B1 = BEEFBEEF
		NOP     4
		CMPEQ   .L2     B1, B2, B1      ;B1 = 1, if B1 = B2
		SUB     .L2     B1, 1, B1       ;B1 = 0
	[!B1]   LDW     .D1     *--A5[5], B2    ;if B1 = 0, then dec.
		NOP     4                       ;A5 by 5 and put in B2
		CMPEQ   .L2x    B2, A10, B2     ;if A10 = B2, B2 = 1
		SUB     .L2     B2, 1, B2       ;B2 = 0
	[B2]    B       .S2     ERRCIR4         ;ERROR, if B2 != 0
		NOP     5

;checking for post increment
		LDW     .D1     *++A5[2], B1    ;moving the ptr
		LDW     .D1     *A5++[6], B2    ;post increment test
		NOP     4                       ;A5 = B2 and ++ by 6
		CMPEQ   .L2     B1, B2, B2      ;if B2 = B1, B2 = 1
		SUB     .L2     B2, 1, B2       ;B2 = 0
		LDW     .D1     *A5, A2         ;A2 = A5 - current 
		NOP     4                       ;location of the ptr
		CMPEQ   .L1     A2, A10, A2     ;if A2 = A10, A2 = 1
		SUB     .L1     A2, 1, A2       ;A2 = 0
	[A2]    B       .S2     ERRCIR4         ;ERROR, if A2 != 0
		NOP     5

;checking for wrap around when offsetting (post and pre work the
;same way) B1 = BEEFBEEFh
		LDW     .D1     *++A5[3], B2    ;moving the ptr 
		NOP     4                       ;to A5[6] = B2
		CMPEQ   .L2     B2, B1, B1      ;if B2 = B1, B2 = 1
		SUB     .L2     B1, 1, B1       ;B1 = 0
		LDW     .D1     *+A5[5], B2     ;B2 = A5 (pre-offset
		NOP     4                       ;of 5)
		CMPEQ   .L2x    B2, A10, B2     ;if B2 = A10, B2 = 1
		SUB     .L2     B2, 1, B2       ;B2 = 0
	[B2]    B       .S2     ERRCIR4         ;ERROR, if B2 != 0
		NOP     5
		ZERO    .S2     B12
		MVC     .S2     B12, AMR

;loading (or popping) appropriate registers from the stack
ENDCIR:
		LDW     .D2     *++B15[1], B10  ;before returning to
		LDW     .D2     *++B15[1], A10  ;the calling routine
		NOP     4

		B       .S2     B3      ;RETURN TO THE 
		NOP     5               ;MAIN CONTROL SHELL

;*
;* ERROR HANDLERS
;*

ERRCIR1:        MVKL    .S2     71h, B0         ;ADDAB error
		B       .S2     ENDCIR
		NOP     5

ERRCIR2:        MVKL    .S2     72h, B0         ;ADDAH error
		B       .S2     ENDCIR
		NOP     5

ERRCIR3:        MVKL    .S2     73h, B0         ;ADDAW error
		B       .S2     ENDCIR
		NOP     5

ERRCIR4:        MVKL    .S2     74h, B0         ;LDW error
		B       .S2     ENDCIR
		NOP     5

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