countroller.rpt

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-- Node name is '|LPM_ADD_SUB:261|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC2_A2', type is buried 
!_LC2_A2 = _LC2_A2~NOT;
_LC2_A2~NOT = LCELL( _EQ001);
  _EQ001 =  CountNum3 & !_LC7_A2;

-- Node name is '|LPM_ADD_SUB:261|addcore:adder|pcarry4' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A3', type is buried 
!_LC4_A3 = _LC4_A3~NOT;
_LC4_A3~NOT = LCELL( _EQ002);
  _EQ002 =  CountNum4 & !_LC2_A2;

-- Node name is '|LPM_ADD_SUB:261|addcore:adder|:125' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_A2', type is buried 
!_LC7_A2 = _LC7_A2~NOT;
_LC7_A2~NOT = LCELL( _EQ003);
  _EQ003 =  CountNum2
         #  CountNum0 &  CountNum1;

-- Node name is ':10' 
-- Equation name is '_LC3_A4', type is buried 
_LC3_A4  = DFFE( _EQ004, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ004 = !Hold &  _LC4_A4
         #  Hold &  _LC3_A4;

-- Node name is ':12' 
-- Equation name is '_LC2_A4', type is buried 
_LC2_A4  = DFFE( _EQ005, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ005 = !Hold &  _LC1_A4
         #  Hold &  _LC2_A4;

-- Node name is ':14' 
-- Equation name is '_LC4_A2', type is buried 
_LC4_A2  = DFFE( _EQ006, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ006 = !Hold &  _LC5_A2
         #  Hold &  _LC4_A2;

-- Node name is ':16' 
-- Equation name is '_LC1_A1', type is buried 
_LC1_A1  = DFFE( _EQ007, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ007 = !Hold &  _LC4_A1
         #  Hold &  _LC1_A1;

-- Node name is ':18' 
-- Equation name is '_LC3_A2', type is buried 
_LC3_A2  = DFFE( _EQ008, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ008 = !Hold &  _LC6_A2
         #  Hold &  _LC3_A2;

-- Node name is ':20' 
-- Equation name is '_LC1_A5', type is buried 
_LC1_A5  = DFFE( _EQ009, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ009 = !CountNum0 & !Hold &  _LC1_A3
         #  CountNum0 & !Hold & !_LC1_A3
         #  Hold &  _LC1_A5;

-- Node name is ':22' 
-- Equation name is '_LC7_A7', type is buried 
_LC7_A7  = DFFE( _EQ010, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ010 = !CountNum5 & !CountNum6
         #  CountNum4 & !CountNum5
         # !CountNum4 &  CountNum5 &  CountNum6;

-- Node name is ':24' 
-- Equation name is '_LC5_A9', type is buried 
_LC5_A9  = DFFE( _EQ011, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ011 =  CountNum4 &  CountNum6
         # !CountNum4 & !CountNum6;

-- Node name is ':26' 
-- Equation name is '_LC1_A2', type is buried 
_LC1_A2  = DFFE( _EQ012, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ012 = !CountNum3 &  _LC1_A12
         # !CountNum3 & !CountNum6
         # !CountNum3 &  _LC7_A2
         #  CountNum3 &  CountNum6 & !_LC1_A12 & !_LC7_A2;

-- Node name is ':28' 
-- Equation name is '_LC3_A1', type is buried 
_LC3_A1  = DFFE( _EQ013, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ013 = !CountNum2 & !_LC5_A1
         # !CountNum1 &  CountNum2 &  _LC5_A1
         # !CountNum0 &  CountNum2 &  _LC5_A1
         #  CountNum0 &  CountNum1 & !CountNum2;

-- Node name is ':30' 
-- Equation name is '_LC8_A1', type is buried 
_LC8_A1  = DFFE( _EQ014, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ014 = !CountNum1 & !_LC5_A1
         # !CountNum0 & !CountNum1
         #  CountNum0 &  CountNum1 &  _LC5_A1;

-- Node name is ':32' 
-- Equation name is '_LC5_A6', type is buried 
_LC5_A6  = DFFE( _EQ015, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ015 = !CountNum0 &  _LC1_A12
         #  CountNum0 &  CountNum6 & !_LC1_A12
         # !CountNum0 & !CountNum6;

-- Node name is ':34' 
-- Equation name is '_LC1_A8', type is buried 
_LC1_A8  = DFFE( _EQ016, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ016 =  CountNum6
         #  Hold;

-- Node name is ':36' 
-- Equation name is '_LC2_A3', type is buried 
_LC2_A3  = DFFE( _EQ017, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ017 = !CountNum5 & !CountNum6 & !Hold
         # !CountNum6 & !Hold &  _LC4_A3;

-- Node name is ':38' 
-- Equation name is '_LC3_A3', type is buried 
_LC3_A3  = DFFE( _EQ018, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ018 =  CountNum5 & !CountNum6 & !Hold & !_LC4_A3;

-- Node name is ':40' 
-- Equation name is '_LC1_A10', type is buried 
_LC1_A10 = DFFE(!CountNum6, GLOBAL(!Clock),  VCC,  VCC,  VCC);

-- Node name is ':42' 
-- Equation name is '_LC2_A1', type is buried 
_LC2_A1  = DFFE( _LC5_A1, GLOBAL(!Clock),  VCC,  VCC,  VCC);

-- Node name is ':44' 
-- Equation name is '_LC1_A11', type is buried 
_LC1_A11 = DFFE( _EQ019, GLOBAL(!Clock),  VCC,  VCC,  VCC);
  _EQ019 =  CountNum6 &  _LC1_A12;

-- Node name is ':148' 
-- Equation name is '_LC1_A3', type is buried 
_LC1_A3  = LCELL( _EQ020);
  _EQ020 =  CountNum6
         #  CountNum5 & !_LC4_A3;

-- Node name is ':407' 
-- Equation name is '_LC4_A4', type is buried 
_LC4_A4  = LCELL( _EQ021);
  _EQ021 = !CountNum4 & !CountNum5 & !CountNum6
         # !CountNum5 & !CountNum6 &  _LC2_A2
         #  CountNum4 & !CountNum5 &  CountNum6
         # !CountNum4 &  CountNum5 &  CountNum6;

-- Node name is ':422' 
-- Equation name is '_LC1_A4', type is buried 
_LC1_A4  = LCELL( _EQ022);
  _EQ022 = !CountNum4 & !_LC1_A3 &  _LC2_A2
         #  CountNum4 & !_LC1_A3 & !_LC2_A2
         #  CountNum4 &  CountNum6 &  _LC1_A3
         # !CountNum4 & !CountNum6 &  _LC1_A3;

-- Node name is ':434' 
-- Equation name is '_LC5_A2', type is buried 
_LC5_A2  = LCELL( _EQ023);
  _EQ023 = !CountNum3 &  _LC7_A2
         #  CountNum3 & !_LC1_A3 & !_LC7_A2
         # !CountNum3 &  _LC1_A3;

-- Node name is ':446' 
-- Equation name is '_LC4_A1', type is buried 
_LC4_A1  = LCELL( _EQ024);
  _EQ024 = !CountNum1 &  CountNum2 & !_LC1_A3
         # !CountNum0 &  CountNum2 & !_LC1_A3
         #  CountNum0 &  CountNum1 & !CountNum2
         # !CountNum2 &  _LC1_A3;

-- Node name is ':458' 
-- Equation name is '_LC6_A2', type is buried 
_LC6_A2  = LCELL( _EQ025);
  _EQ025 = !CountNum0 & !CountNum1
         #  CountNum0 &  CountNum1 & !_LC1_A3
         # !CountNum1 &  _LC1_A3;

-- Node name is ':600' 
-- Equation name is '_LC1_A12', type is buried 
_LC1_A12 = LCELL( _EQ026);
  _EQ026 =  CountNum4
         # !_LC2_A2
         #  CountNum5;

-- Node name is ':867' 
-- Equation name is '_LC5_A1', type is buried 
_LC5_A1  = LCELL( _EQ027);
  _EQ027 =  CountNum6 & !_LC1_A12;



Project Information                                     f:\kkk\countroller.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'ACEX1K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = off
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:00
   Timing SNF Extractor                   00:00:01
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 23,243K