📄 syslib_5100.c
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# endif /* INCLUDE_MCG_END */# ifdef INCLUDE_FEI_END# include "./sysFei82557End.c"# endif /* INCLUDE_FEI_END */# endif /* INCLUDE_END */#endif /* INCLUDE_NETWORK */#include "sysSerial.c"#include "mem/byteNvRam.c"#include "sysMotVpd.c"#include "timer/ppcDecTimer.c" /* PPC603 & 604 have on chip timers */#ifdef INCLUDE_SCSI# include "sysScsi.c" /* sysScsiInit routine */#endif /* INCLUDE_SCSI */#ifdef INCLUDE_SHOW_ROUTINES# include "sysMotVpdShow.c"# include "hawkSmcShow.c"#endif /* INCLUDE_SHOW_ROUTINES */#include "sysCache.c"#include "ns8730xSuperIo.c"#include "universe.c"#include "hawkPhb.c"#include "hawkMpic.c"#ifdef INCLUDE_HAWK_AUXCLK# include "hawkAuxClk.c"#endif /* INCLUDE_HAWK_AUXCLK *//* M48t59 watchdog timer support. */#ifdef INCLUDE_M48T559WDT# include "m48tWdt.c"#endif /* INCLUDE_M48T559WDT *//* defines for sysBusTas() and sysBusTasClear() */#define VMEBUS_OWNER (*UNIVERSE_MAST_CTL & LONGSWAP(MAST_CTL_VOWN_ACK))#define CPU_CLOCKS_PER_LOOP 10#define LOCK_TIMEOUT 10#define UNLOCK_TIMEOUT 10000#if defined (INCLUDE_ALTIVEC)/********************************************************************************* sysAltivecProbe - Check if the CPU has ALTIVEC unit.** This routine returns OK it the CPU has an ALTIVEC unit in it.* Presently it checks for 7400 & 7410* RETURNS: OK - for 7400/7410 Processor type* ERROR - otherwise.*/int sysAltivecProbe (void) { ULONG regVal; int altivecUnitPresent = ERROR; /* The CPU type is indicated in the Processor Version Register (PVR) */ regVal = CPU_TYPE; switch (regVal) { case CPU_TYPE_7400: case CPU_TYPE_7410: altivecUnitPresent = OK; break; default: break; } /* switch */ return (altivecUnitPresent); }#endif /* INCLUDE_ALTIVEC *//******************************************************************************** sysModel - return the model name of the CPU board** This routine returns the model name of the CPU board. The returned string* depends on the board model and CPU version being used.** RETURNS: A pointer to the string.*/char * sysModel (void) { UINT cpu; char cpuStr[80]; /* Determine CPU type and build display string */ cpu = CPU_TYPE; switch (cpu) { case CPU_TYPE_604E: sprintf(cpuStr, "604e"); break; case CPU_TYPE_604R: sprintf(cpuStr, "604r"); break; case CPU_TYPE_603P: sprintf(cpuStr, "603p"); break; case CPU_TYPE_603E: sprintf(cpuStr, "603e"); break; case CPU_TYPE_750: sprintf(cpuStr, "750"); break; case CPU_TYPE_7400: if (CPU_REV < CPU_REV_7410) sprintf(cpuStr, "7400"); else sprintf(cpuStr, "7410"); break; case CPU_TYPE_7410: sprintf(cpuStr, "7410"); break; default: sprintf (cpuStr, "60%d", cpu); break; } sprintf (sysModelStr, "Motorola %s - MPC %s", sysProductStr, cpuStr); return (sysModelStr); }/********************************************************************************* sysBspRev - return the BSP version and revision number** This routine returns a pointer to a BSP version and revision number, for* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.** RETURNS: A pointer to the BSP version/revision string.*/char * sysBspRev (void) { return (BSP_VERSION BSP_REV); }/******************************************************************************** sysHwInit - initialize the system hardware** This routine initializes various features of the CPU board. It is called* by usrInit() in usrConfig.c. This routine sets up the control registers* and initializes various devices if they are present.** NOTE: This routine should not be called directly by the user application. It* cannot be used to initialize interrupt vectors.** RETURNS: N/A*/void sysHwInit (void) { int pciBusNo; /* PCI bus number */ int pciDevNo; /* PCI device number */ int pciFuncNo; /* PCI function number */ /* Do the Hawk PCI-Host Bridge phase 1 init */ (void) sysHawkPhbInit (); /* Initialize the VPD information */ (void) sysVpdInit (); /* Do the Hawk PCI-Host Bridge phase 2 init */ (void) sysHawkPhbInit2 (); /* Validate CPU type */ sysCpuCheck(); /* * If MPC7400/7410 (Max/Nitro): * Setup exception addresses. * Disable & invalidate if L2 enabled. */ if ((CPU_TYPE == CPU_TYPE_7400) || (CPU_TYPE == CPU_TYPE_7410)) {#if defined(INCLUDE_CACHE_SUPPORT) && defined(INCLUDE_CACHE_L2) sysL2CacheDisable ();#endif /* defined(INCLUDE_CACHE_SUPPORT) && defined(INCLUDE_CACHE_L2) */ } /* Super I/O init */ ns8730xSuperIoInit (); /* Initialize PCI driver library. */ if (pciConfigLibInit (PCI_MECHANISM_1, PCI_PRIMARY_CAR, PCI_PRIMARY_CDR, 0) != OK) { sysToMonitor (BOOT_NO_AUTOBOOT); } if ((pciIntLibInit ()) != OK) { sysToMonitor (BOOT_NO_AUTOBOOT); }#ifdef INCLUDE_PCI_AUTOCONF /* * Test to determine if we need to configure the PCI busses with * sysPciAutoConfig(). If we are coming up from a ROM-based image * then we need to reconfigure. If we have been booted from a ROM * image then we don't need to reconfigure since the bootrom will * already have reconfigured the PCI busses. We must avoid * configuring the PCI busses twice on startup. */ if ( !PCI_AUTOCONFIG_DONE ) { /* in ROM boot phase, OK to continue and configure PCI busses. */ sysPciAutoConfig (); PCI_AUTOCONFIG_FLAG = TRUE; /* Remember that PCI is configured */ }#endif /* INCLUDE_PCI_AUTOCONF */ /* Get the base address for the Universe registers if present */ if (pciFindDevice ((PCI_ID_UNIVERSE & 0xFFFF), (PCI_ID_UNIVERSE >> 16) & 0xFFFF, 0, &pciBusNo, &pciDevNo, &pciFuncNo) != ERROR) { pciConfigInLong(pciBusNo, pciDevNo, pciFuncNo, PCI_CFG_BASE_ADDRESS_0, &univBaseAdrs); if (univBaseAdrs & PCI_BAR_SPACE_IO) { univBaseAdrs = (univBaseAdrs & PCI_IOBASE_MASK) - PCI_MSTR_IO_BUS + PCI_MSTR_IO_LOCAL; } else { univBaseAdrs = (univBaseAdrs & PCI_MEMBASE_MASK) - PCI_MSTR_MEM_BUS + PCI_MSTR_MEM_LOCAL; } /* * Initialize the non-PCI Config Space registers of the * Universe which doesn't have a true device driver. */ sysUniverseInit(); } /* * The Hawk powers up with the correct PCI Header values. * So, no initialization of the PCI Header is performed. */ /* * The IBC powers up with most of the PCI Header values * being correct. So, only registers that do not power-up * in the correct state are modified here. */ if (pciFindDevice ((PCI_ID_IBC & 0xFFFF), (PCI_ID_IBC >> 16) & 0xFFFF, 0, &pciBusNo, &pciDevNo, &pciFuncNo) != ERROR) { /* * Enable Guaranteed Access Timing (default), the Arbiter Timeout * Timer, and Bus Lock (locks PCI Bus when PCI LOCK# signal asserted) */ pciConfigOutByte (pciBusNo, pciDevNo, pciFuncNo, PCI_CFG_IBC_ARB_CTL, (ARB_CTL_GAT | ARB_CTL_TIMEOUT_TIMER | ARB_CTL_BUS_LOCK)); /* * Initialize the non-PCI Config Space registers of the * IBC which doesn't have a true device driver. */ sysIbcInit(); } /* * Initialize the extended portion of the Hawk's PCI Header. * The non-PCI Config Space registers have already been * initialized in the initial startup code. */ if (pciFindDevice ((PCI_ID_HAWK & 0xFFFF), (PCI_ID_HAWK >> 16) & 0xFFFF, 0, &sysHawkPciBusNo, &sysHawkPciDevNo, &sysHawkPciFuncNo) != ERROR) { (void)sysHawkInitPhbExt (sysHawkPciBusNo, sysHawkPciDevNo, sysHawkPciFuncNo); } /* Reset the MPIC. */ sysPciWrite32( MPIC_ADDR(MPIC_GLOBAL_CONFIG_REG), RESET_CNTRLR ); /* Initialize the non-PCI Config Space registers of the Hawk Mpic. */ sysMpicInit();#ifdef INCLUDE_VME_DMA /* Initialize the VMEbus DMA driver */ sysVmeDmaInit();#endif /* INCLUDE_VME_DMA */ /* set shared memory TAS Clear routine pointer */ smUtilTasClearRtn = (VOIDFUNCPTR)sysBusTasClear; /* set pointer to bus probing hook */ _func_vxMemProbeHook = (FUNCPTR)sysBusProbe; /* Initialize COM1 and COM2 serial channels */ sysSerialHwInit(); /* Disable the watchdog timer */ sysNvWrite ((ULONG)WD_TIMER, 0); /* * If mmu tables are used, this is where we would dynamically * update the entry describing main memory, using sysPhysMemTop(). * We must call sysPhysMemTop () at sysHwInit() time to do * the memory autosizing if available. */ sysPhysMemTop (); /* clear Hawk error conditions */ sysHawkErrClr (); /* Upon completion, clear BFL (Board Fail) LED */ *(UINT8 *)BRD_MOD_FAIL_REG_ADRS &= ~BRD_MOD_FAIL_MASK; }/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** Normally, the user specifies the amount of physical memory with the* macro LOCAL_MEM_SIZE in config.h. BSPs that support run-time* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the* true size of physical memory.** NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application* use. See sysMemTop() for more information on reserving memory.** RETURNS: The address of the top of physical memory.** SEE ALSO: sysMemTop()*/char * sysPhysMemTop (void) { static char * sysPhysMemSize = NULL; /* ptr to top of mem + 1 */#ifdef LOCAL_MEM_AUTOSIZE UINT32 dramIndex; int i, j; static UINT32 dramSize[] = { 0x00000000, /* 0MB */ 0x02000000, /* 32MB (4Mx16) */ 0x04000000, /* 64MB (8Mx8) */ 0x04000000, /* 64MB (8Mx16) */ 0x08000000, /* 128MB (16Mx4) */ 0x08000000, /* 128MB (16Mx8) */ 0x08000000, /* 128MB (16Mx16) */ 0x10000000, /* 256MB (32Mx4) */ 0x10000000, /* 256MB (32Mx8) */ 0x20000000, /* 512MB (64Mx4) */ 0x40000000, /* 1GB (64Mx8) */ 0x80000000, /* 2GB (128x4) */ 0x00000000, /* 0MB reserved */ 0x00000000, /* 0MB reserved */ 0x00000000, /* 0MB reserved */ 0x00000000, /* 0MB reserved */ }; static UINT8 *dramAttr[] = { (UINT8 *) HAWK_SMC_SDRAM_ATTR_AD, (UINT8 *) HAWK_SMC_SDRAM_ATTR_EH, };#endif /* LOCAL_MEM_AUTOSIZE */ if (sysPhysMemSize == NULL) {#ifdef LOCAL_MEM_AUTOSIZE /* * Do dynamic memory sizing. * * Since Hawk memory controller chip has already been set to * control all memory, just read and interpret its DRAM Attributes * Register. */ for (i = 0; i < NELEMENTS(dramAttr); i++) { for (j = 0; j < 4; j++) { if (dramAttr[i][j] & 0x80) { dramIndex = dramAttr[i][j] & 0x0F; (UINT32)sysPhysMemSize += dramSize [dramIndex]; } } } /* Adjust initial DRAM size to actual physical memory. */ sysPhysMemDesc[1].len = (ULONG)sysPhysMemSize - (ULONG)sysPhysMemDesc[1].physicalAddr;#else /* not LOCAL_MEM_AUTOSIZE */ /* Don't do auto-sizing, use defined constants. */
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