📄 syslib_765.c
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if ( (pSrc->winType == adrsSpace) && (adrs >= pSrc->winBase) && (adrs <= pSrc->winLimit) ) { *pTransAdrs = ( adrs - pSrc->winBase + pDest->winBase ); return (OK); }; /* advance to next window */ pSrc++; pDest++; } /* * no window was found to contain adrs. indicate that translation was * not possible. */ return (ERROR); }/******************************************************************************** sysCpuToPciAdrs - translate a cpu address to a pci bus address** This routine converts an address as seen from the cpu to the equivalent pci* address, if it exists. The input address is the address as seen by the cpu.** RETURNS: OK, or ERROR if the address space is unknown or the mapping is not* possible.** SEE ALSO: sysPciToCpuAdrs()*/LOCAL STATUS sysCpuToPciAdrs ( int adrsSpace, /* bus address space where busAdrs resides */ char * localAdrs, /* local address to convert */ char ** pBusAdrs /* where to return bus address */ ) { return (sysHawkTransAdrs (adrsSpace, (UINT32)localAdrs, (UINT32 *)pBusAdrs, sysValidHawkWindows, &sysHawkCpuToPciWin[0], &sysHawkPciToCpuWin[0]) ); }/******************************************************************************** sysPciToCpuAdrs - translate a pci bus address to a cpu address** This routine converts an address as seen from the pci bus to the equivalent* cpu address, if it exists. The input address is the address as seen by the* pci bus.** RETURNS: OK, or ERROR if the address space is unknown or the mapping is not* possible.** SEE ALSO: sysCpuToPciAdrs()*/LOCAL STATUS sysPciToCpuAdrs ( int adrsSpace, /* bus address space where busAdrs resides */ char * localAdrs, /* local address to convert */ char ** pBusAdrs /* where to return bus address */ ) { return (sysHawkTransAdrs (adrsSpace, (UINT32)localAdrs, (UINT32 *)pBusAdrs, sysValidHawkWindows, &sysHawkPciToCpuWin[0], &sysHawkCpuToPciWin[0]) ); }/******************************************************************************** sysLocalToBusAdrs - convert a local CPU address to a PCI bus address** Given a CPU address, this routine returns a corresponding local PCI bus* or Compact (backpanel) PCI bus address provided that such an address exists.* The target PCI bus (local or backpanel) is selected by the adrsSpace* parameter. Legal values for this parameter are found in "pci.h". If a* transparent bridge is used to access the Compact PCI bus, the local PCI bus* and the backpanel PCI bus share the same address space. In this case, the* local and backpanel address space designators are synonomous.** RETURNS: OK, or ERROR if the address space is unknown or the mapping is not* possible.** SEE ALSO: sysBusToLocalAdrs()*/STATUS sysLocalToBusAdrs ( int adrsSpace, /* bus address space where busAdrs resides */ char * localAdrs, /* local address to convert */ char ** pBusAdrs /* where to return bus address */ ) { switch (adrsSpace) { case PCI_SPACE_IO_PRI: case PCI_SPACE_IO_SEC: /* convert from cpu address space to local pci space */ if ( sysCpuToPciAdrs (PCI_BAR_SPACE_IO, localAdrs, pBusAdrs) != OK ) return (ERROR);#ifdef INCLUDE_DEC2155X /* * if continuing on to the backpanel using the dec2155x, translate * from local pci space to compact pci space. */ if ( PCI_SPACE_IS_CPCI(adrsSpace) ) return ( sysPciToCpciAdrs (PCI_BAR_SPACE_IO, *pBusAdrs, pBusAdrs) );#endif /* INCLUDE_DEC2155X */ break; case PCI_SPACE_MEMIO_PRI: case PCI_SPACE_MEM_PRI: case PCI_SPACE_MEMIO_SEC: case PCI_SPACE_MEM_SEC: /* convert from cpu address space to local pci address space */ if (sysCpuToPciAdrs (PCI_BAR_SPACE_MEM, localAdrs, pBusAdrs) != OK ) return (ERROR);#ifdef INCLUDE_DEC2155X /* * if continuing on to the backpanel using the dec2155x, translate * from local pci space to compact pci space. */ if ( PCI_SPACE_IS_CPCI(adrsSpace) ) return ( sysPciToCpciAdrs(PCI_BAR_SPACE_MEM, *pBusAdrs, pBusAdrs) );#endif /* INCLUDE_DEC2155X */ break; default: return (ERROR); break; } return (OK); }/******************************************************************************** sysBusToLocalAdrs - convert a PCI bus address to a local CPU address** Given a local or Compact (backpanel) PCI address, this routine returns a* corresponding local CPU bus address provided such an address exists. The* originating PCI bus (local or backpanel) is selected by the adrsSpace* parameter. Legal values for this parameter are found in "pci.h". If a* transparent bridge is used to access the Compact PCI bus, the local PCI bus* and the Compact PCI bus share the same address space. In this case, the* local and backpanel address space designators are synonomous.** RETURNS: OK, or ERROR if the address space is unknown or the mapping is not* possible.** SEE ALSO: sysLocalToBusAdrs()*/STATUS sysBusToLocalAdrs ( int adrsSpace, /* bus address space where busAdrs resides */ char * busAdrs, /* bus address to convert */ char ** pLocalAdrs /* where to return local address */ ) { switch (adrsSpace) { case PCI_SPACE_IO_SEC:#ifdef INCLUDE_DEC2155X /* * translate from compact PCI address space to local PCI address * space. */ if ( sysCpciToPciAdrs (PCI_BAR_SPACE_IO, busAdrs, &busAdrs) != OK ) return (ERROR); /* fall through */#endif /* INCLUDE_DEC2155X */ case PCI_SPACE_IO_PRI: /* * translate from local PCI address space to CPU address * space. */ return ( sysPciToCpuAdrs (PCI_BAR_SPACE_IO, busAdrs, pLocalAdrs) ); break; case PCI_SPACE_MEMIO_SEC: case PCI_SPACE_MEM_SEC:#ifdef INCLUDE_DEC2155X /* * translate from compact PCI address space to local PCI address * space. */ if ( sysCpciToPciAdrs (PCI_BAR_SPACE_MEM, busAdrs, &busAdrs) != OK) return (ERROR); /* fall through */#endif /* INCLUDE_DEC2155X */ case PCI_SPACE_MEMIO_PRI: case PCI_SPACE_MEM_PRI: /* * translate from local PCI address space to CPU address * space. */ return (sysPciToCpuAdrs (PCI_BAR_SPACE_MEM, busAdrs, pLocalAdrs) ); break; default: return (ERROR); break; } }/********************************************************************************* sysBusTas - test and set a location across the bus** The cPCI bridge chips do not support PCI target locking, therefore there is* no atomic RMW operation. This routine performs a software-based mutual* exclusion algorithm in place of a true test and set.** NOTE: This algorithm is performed through a PCI-to-PCI bridge to a shared* location that is subject to unprotected access by multiple simultaneous* processors. There is the possibility that the bridge will deliver a delayed* read completion to a PCI bus master which was not the original initiator of* the delayed read. The bridge delivers the delayed read completion to the new* requestor because it believes that the new delayed read request is actually* the original master performing a delayed read retry as required by the PCI* spec. When the original master comes back with the genuine retry, the bridge* treats it as a new request. When this "aliasing" occurs, a read performed* after a write can appear to complete ahead of the write, which is in violation* of PCI transaction ordering rules. Since this algorithm depends on a strict* time-ordered sequence of operations, it can deadlock under this condition.* To prevent the deadlock, a throw-away read must be performed after the initial* write. Since the bridge only remembers once instance of a queued delayed* read request, the throw-away read will "consume" the results of a* mis-directed read completion and subsequent read requests are guaranteed to* be queued and completed after the write.** RETURNS: TRUE if lock acquired.* FALSE if lock not acquired.** SEE ALSO: sysBusTasClear()*/BOOL sysBusTas ( char * adrs /* address to be tested and set */ ) { FAST int value; /* value to place in lock variable */ FAST int nChecks; /* number of times to re-check lock */ FAST int count; /* running count of re-checks */ int oldLvl; /* previous interrupt level */ volatile int * lockAdrs = (int *)adrs; if (sysSmUtilTasValue == 0) sysSmUtilTasValue = (TAS_CONST + sysProcNumGet ())<< 24; value = sysSmUtilTasValue; /* special value to write */ nChecks = DEFAULT_TAS_CHECKS; /* number of checks to do */ /* Lock out interrupts */ oldLvl = intLock (); /* Test that lock variable is initially empty */ if (*lockAdrs != 0) { intUnlock (oldLvl); return (FALSE); /* someone else has lock */ } /* Set lock value */ *lockAdrs = value; /* Perform a preliminary read due to PCI bridge issues */ count = *lockAdrs; /* Check that no one else is trying to take lock */ for (count = 0; count < nChecks; count++) { if (*lockAdrs != value) { intUnlock (oldLvl); return (FALSE); /* someone else stole lock */ } } intUnlock (oldLvl); return (TRUE); /* exclusive access obtained */ }/******************************************************************************** sysBusTasClear - clear a location set by sysBusTas()** This routine clears a bus test and set location. This routine is only* required if the sysBusTas() routine uses special semaphore techniques (such* as bus locking). Since the sysBusTas routine doesn't use any special* semaphore techniques, this routine is a no-op.** If used, the BSP activates this routine by placing its address into the* global variable 'smUtilTasClearRtn'.** RETURNS: N/A** SEE ALSO: sysBusTas()*/void sysBusTasClear ( volatile char * address /* address to be tested-and-cleared */ ) { }/******************************************************************************** sysNvRead - read one byte from NVRAM** This routine reads a single byte from a specified offset in NVRAM (User I2C* SROM).** RETURNS: The byte from the specified NVRAM offset.*/UCHAR sysNvRead ( ULONG offset /* NVRAM offset to read the byte from */ ) { sysOutByte (NV_RAM_LSB_REG, LSB(offset)); sysOutByte (NV_RAM_MSB_REG, MSB(offset)); return sysInByte (NV_RAM_DAT_REG); }/******************************************************************************** sysNvWrite - write one byte to NVRAM** This routine writes a single byte to a specified offset in NVRAM.(User I2C* SROM).** RETURNS: N/A*/void sysNvWrite ( ULONG offset, /* NVRAM offset to write the byte to */ UCHAR data /* datum byte */ ) { sysOutByte (NV_RAM_LSB_REG, LSB(offset)); sysOutByte (NV_RAM_MSB_REG, MSB(offset)); sysOutByte (NV_RAM_DAT_REG, data); }/********************************************************************************* sysCpuCheck - confirm the CPU type** This routine validates the cpu type. If the wrong cpu type is discovered* a message is printed using the serial channel in polled mode.** RETURNS: N/A.*/void sysCpuCheck (void) { /* Check for a valid CPU type; If one is found, just return */#if (CPU == PPC603) if ((CPU_TYPE == CPU_TYPE_603) || (CPU_TYPE == CPU_TYPE_603E) || (CPU_TYPE == CPU_TYPE_603P)) { return; }#else /* (CPU == PPC604) */ if ((CPU_TYPE == CPU_TYPE_604) || (CPU_TYPE == CPU_TYPE_604E) || (CPU_TYPE == CPU_TYPE_604R) || (CPU_TYPE == CPU_TYPE_750) || (CPU_TYPE == CPU_TYPE_7400) || (CPU_TYPE == CPU_TYPE_7410)) { return; }#endif /* (CPU == PPC604) */ /* Invalid CPU type; print error message and terminate */ sysDebugMsg (sysWrongCpuMsg, EXIT_TO_SYSTEM_MONITOR); /* does not return */ }/********************************************************************************* sysModeCheck - confirm the operating mode** This routine validates the operating mode. If the wrong mode is discovered* a message is printed using the serial channel in polled mode.** RETURNS: N/A.*/void sysModeCheck (void) { /* * if board status register indicates target mode (SYSCON bit set), * report the error and shut down. Target mode is not supported by this * BSP. */ if ( !sysSysconAsserted ()) { sysDebugMsg( "sysModeCheck: SYSCON negated, INVALID OPERATING MODE!\r\n\n", EXIT_TO_SYSTEM_MONITOR); } }/*******************************************************************************
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