syslib.c

ads826x bsp 重要代码:sysLib.c - Motorola ads 8260 board system-dependent library

    cacheDisable(INSTRUCTION_CACHE);
    cacheDisable(DATA_CACHE);

    sysAuxClkDisable();

    /* disable both RS232 ports on the board */

    *BCSR1 |= (BCSR1_RS232EN_1_L);
    *BCSR1 |= (BCSR1_RS232EN_2_L);

    sysSerialReset();		/* reset the serial device */

    vxMsrSet (0);

    (*pRom) (startType);	/* jump to bootrom entry point */

    return (OK);	/* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: NA
*/

void sysHwInit2 (void)
    {
    LOCAL BOOL configured = FALSE;
    int immrVal = vxImmrGet();

    CACHE_PIPE_FLUSH();

    if (!configured)
	{

	/* initialize serial interrupts */

	sysSerialHwInit2();

	* M8260_SCCR(immrVal) &= ~M8260_SCCR_TBS;
	CACHE_PIPE_FLUSH();

	configured = TRUE;

#ifdef INCLUDE_FEI_END
        sys557PciInit ();            /* Intel 82557/9 device */
#endif /* INCLUDE_FEI_END */

#ifdef INCLUDE_PCI_DMA
	pciDmaInit();
#endif /* INCLUDE_PCI_DMA */

#ifdef INCLUDE_PCI_ERROR_HANDLING
        pciErrorHandlingInit();
#endif /* INCLUDE_PCI_ERROR_HANDLING */

	}
    }

/******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
* 
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return (sysProcNum);
    }

/******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board.  Processor numbers
* should be unique on a single backplane.
*
* Not applicable for the busless 8260Ads.
*
* RETURNS: NA
*
* SEE ALSO: sysProcNumGet()
*
*/

void sysProcNumSet
    (
    int 	procNum			/* processor number */
    )
    {
    sysProcNum = procNum;
    }

/******************************************************************************
*
* sysLocalToBusAdrs - convert a local address to a bus address
*
* This routine gets the VMEbus address that accesses a specified local
* memory address.
*
* Not applicable for the 8260Ads
*
* RETURNS: ERROR, always.
*
* SEE ALSO: sysBusToLocalAdrs()
*/
 
STATUS sysLocalToBusAdrs
    (
    int 	adrsSpace,	/* bus address space where busAdrs resides */
    char *	localAdrs,	/* local address to convert */ 
    char **	pBusAdrs	/* where to return bus address */ 
    )
    {
    return (ERROR);
    }

/******************************************************************************
*
* sysBusToLocalAdrs - convert a bus address to a local address
*
* This routine gets the local address that accesses a specified VMEbus
* physical memory address.
*
* Not applicable for the 8260Ads
*
* RETURNS: ERROR, always.
*
* SEE ALSO: sysLocalToBusAdrs()
*/

STATUS sysBusToLocalAdrs
    (
     int  	adrsSpace, 	/* bus address space where busAdrs resides */
     char *	busAdrs,   	/* bus address to convert */
     char **	pLocalAdrs 	/* where to return local address */
    )
    {
    return (ERROR);
    }

/******************************************************************************
*
* sysBusTas - test and set a location across the bus
*
* This routine does an atomic test-and-set operation across the backplane.
*
* Not applicable for the 8260Ads.
*
* RETURNS: FALSE, always.
*
* SEE ALSO: vxTas()
*/

BOOL sysBusTas
    (
     char *	adrs		/* address to be tested-and-set */
    )
    {
    return (FALSE);
    }

/******************************************************************************
*
* sysBusClearTas - test and clear 
*
* This routine is a null function.
*
* RETURNS: NA
*/

void sysBusClearTas
    (
     volatile char * address	/* address to be tested-and-cleared */
    )
    {
    } 

/*******************************************************************************
*
* vxImmrGet - return the current IMMR value
*
* This routine returns the current IMMR value
*
* RETURNS: current IMMR value
*
*/

UINT32  vxImmrGet (void)
    {

    return ((*immrAddress) & IMMR_ISB_MASK);

    }

#ifdef INCLUDE_MOTFCCEND

/*******************************************************************************
*
* sysFccEnetEnable - enable the MII interface to the FCC controller
*
* This routine is expected to perform any target specific functions required
* to enable the Ethernet device and to connect the MII interface to the FCC.
*
* RETURNS: OK, or ERROR if the FCC controller cannot be enabled.
*/
 
STATUS sysFccEnetEnable
    (
    UINT32      immrVal,      	/* base address of the on-chip RAM */
    UINT8	fccNum		/* FCC being used */
    )
    {
    /* enable the Ethernet tranceiver for the FCC */

    /* de-assert the reset signal */

    *BCSR1 |= BCSR1_FETH_RST_L;

    /* assert the enable signal */

    *BCSR1 &= ~BCSR1_FETH_IEN_L;
 
    /* introduce a little delay */
 
    taskDelay (sysClkRateGet ());
 
    /* set Port B and C to use MII signals */

    *M8260_IOP_PCPAR(immrVal) |= (0x00003000);	/* (19|18) */
    *M8260_IOP_PCPAR(immrVal) &= ~(0x00600000);	/* ~(10|9) */
    *M8260_IOP_PCSO(immrVal) &= ~(0x00003000);	/* ~(19|18) */
    *M8260_IOP_PCDIR(immrVal) &= ~(0x00003000);	/* ~(19|18) */

    *M8260_IOP_PBPAR(immrVal) |= (0x00003fff);	/* (31|30|29|28|27|26|25|24
						23|22|21|20|19|18) */
    *M8260_IOP_PBDIR(immrVal) |= (0x000003c5);	/* (31|29|25|24|23|22) */
    *M8260_IOP_PBDIR(immrVal) &= ~(0x00003c3a);	/* ~(30|28|27|26|21|20|19|18) */
    *M8260_IOP_PBSO(immrVal) &= ~(0x00003ffb);	/* ~(31|30|28|27|26|25|24|23|
						 22|21|20|19|18) */
    *M8260_IOP_PBSO(immrVal) |= (0x00000004);	/* (29) */

    /* connect FCC2 clocks */

    *M8260_CMXFCR (immrVal)  |= (M8260_CMXFCR_R2CS_CLK13 
				 | M8260_CMXFCR_T2CS_CLK14);

    /* NMSI mode */

    *M8260_CMXFCR (immrVal)  &= ~(M8260_CMXFCR_FC2_MUX);         

    return (OK);
    }
 
/*******************************************************************************
*
* sysFccEnetDisable - disable MII interface to the FCC controller
*
* This routine is expected to perform any target specific functions required
* to disable the Ethernet device and the MII interface to the FCC
* controller.  This involves restoring the default values for all the Port
* B and C signals.
*
* RETURNS: OK, always.
*/
 
STATUS sysFccEnetDisable
    (
    UINT32      immrVal,      	/* base address of the on-chip RAM */
    UINT8	fccNum		/* FCC being used */
    )
    {
    int intLevel = intLock();
 
    /* 
     * configure all Port B and C pins previously used as general 
     * purpose input pins 
     */

    *M8260_IOP_PCPAR(immrVal) &= ~(0x00003000);	/* (19|18) */

    *M8260_IOP_PCDIR(immrVal) &= ~(0x00200000);	/* (10) */

    *M8260_IOP_PBPAR(immrVal) &= ~(0x00003fff);	/* (31|30|29|28|27|26|25|24
						23|22|21|20|19|18) */
    *M8260_IOP_PBDIR(immrVal) &= ~(0x000003c5);	/* (31|29|25|24|23|22) */

    /* disable the Ethernet tranceiver for the FCC */

    /* de-assert the enable signal */

    *BCSR1 |= BCSR1_FETH_IEN_L;

    /* assert the reset signal */

    *BCSR1 &= ~BCSR1_FETH_RST_L;
 
    intUnlock (intLevel);
 
    return (OK);
    }
 
/*******************************************************************************
*
* sysFccEnetAddrGet - get the hardware Ethernet address
*
* This routine provides the six byte Ethernet hardware address that will be
* used by each individual FCC device unit.  This routine must copy
* the six byte address to the space provided by <addr>.
*
* RETURNS: OK, or ERROR if the Ethernet address cannot be returned.
*/
 
STATUS sysFccEnetAddrGet
    (
    int         unit,      	/* base address of the on-chip RAM */
    UCHAR *     addr            /* where to copy the Ethernet address */
    )
    {
    bcopy ((char *) sysFccEnetAddr, (char *) addr, sizeof (sysFccEnetAddr));
 
    return (OK);
    }


/*******************************************************************************
*
* sysFccEnetCommand - issue a command to the Ethernet interface controller
*
* RETURNS: OK, or ERROR if the Ethernet controller could not be restarted.
*/

STATUS sysFccEnetCommand
    (
    UINT32      immrVal,      	/* base address of the on-chip RAM */
    UINT8	fccNum,		/* FCC being used */
    UINT16	command
    )
    {
    return (OK);
    }

#ifndef NSDELAY
#define MOT_FCC_LOOP_NS 1

#define NSDELAY(nsec)                                                   \
    {                                                                   \
    volatile int nx = 0;                                                \
    volatile int loop = (int)(nsec*MOT_FCC_LOOP_NS);                    \
                                                                        \
    for (nx = 0; nx < loop; nx++);                                      \
    }
#endif /* NSDELAY */

/**************************************************************************
*
* sysFccMiiBitWr - write one bit to the MII interface
*
* This routine writes the value in <bitVal> to the MDIO line of a MII
* interface. The MDC line is asserted for a while, and then negated.
* If <bitVal> is NONE, then the MDIO pin should be left in high-impedance
* state.
*
* SEE ALSO: sysFccMiiBitRd()
*
* RETURNS: OK, or ERROR.
*/

STATUS sysFccMiiBitWr
    (
    UINT32      immrVal,      	/* base address of the on-chip RAM */
    UINT8	fccNum,		/* FCC being used */
    INT32        bitVal          /* the bit being written */
    )
    {
    /* 
     * we create the timing reference for transfer of info on the MDIO line 
     * MDIO is mapped on PC9, MDC on PC10. We need to keep the same data
     * on MDIO for at least 400 nsec.
     */

    *M8260_IOP_PCPAR(immrVal) &= ~(0x00600000);	/* ~(10|9) */
    *M8260_IOP_PCDIR(immrVal) |= (0x00600000);	/* (10|9) */
    *M8260_IOP_PCDAT(immrVal) |= (0x00200000);	/* (10) */

    switch (bitVal)
	{
	case 0:
	    *M8260_IOP_PCDAT(immrVal) &= ~(0x00400000);	/* ~(9) */
	    break;

	case 1:
	    *M8260_IOP_PCDAT(immrVal) |= (0x00400000);	/* (9) */
	    break;

	case ((INT32) NONE):
	    /* put it in high-impedance state */

	    *M8260_IOP_PCDIR(immrVal) &= ~(0x00400000);	/* ~(9) */

	    break;

	default:
	    return (ERROR);
	}

    /* delay about 200 nsec. */