intprg.c

Data logger Power transision function switch among different power modes based on new Renesus microc

/***********************************************************************************
FILE NAME  		intprg.c
DESCRIPTION		Interrupt vector declarations for the H8/38347 CPU.

Copyright   : 2006 Renesas Technology Europe Ltd.
Copyright   : 2006 Renesas Technology Corporation.
All Rights Reserved
***********************************************************************************/
                  
/***********************************************************************************
Revision History
DD.MM.YYYY OSO-UID Description
24.05.2006 RTE-VNA First Release
***********************************************************************************/
                  
/***********************************************************************************
System Includes
***********************************************************************************/
/*	Following header file provides access to intrinsic functions to control interrupt
	levels. */
#include <machine.h>

/***********************************************************************************
Compiler Directives
***********************************************************************************/
/* '#pragma section' instructs the linker to place all subsequent code in the named
section. This can be used to relocate code in the memory map. This directive should
be used when debugging code in RAM to provide a section name that can be referenced
in the build | toolchain | linker | section settings. Use of the directive without
the section name will reset the section to default. */

/***********************************************************************************
Interrupt vector declarations
***********************************************************************************/

#pragma section IntPRG
/*  vector 1 Reserved */

/*  vector 2 Reserved */

/*  vector 3 Reserved */

/*  vector 4 IRQ0 */
//__interrupt(vect=4) void INT_IRQ0(void) {/* sleep(); */}

/*  vector 5 IRQ1 */
__interrupt(vect=5) void INT_IRQ1(void) {/* sleep(); */}

/*  vector 6 IRQ2 */
__interrupt(vect=6) void INT_IRQ2(void) {/* sleep(); */}

/*  vector 7 IRQ3 */
__interrupt(vect=7) void INT_IRQ3(void) {/* sleep(); */}

/*  vector 8 IRQ4 */
__interrupt(vect=8) void INT_IRQ4(void) {/* sleep(); */}

/*  vector 9 WKP0_7 */
__interrupt(vect=9) void INT_WKP0_7(void) {/* sleep(); */}

/*  vector 10 SCI1 */
__interrupt(vect=10) void INT_SCI1(void) {/* sleep(); */}

/*  vector 11 Timer A Overflow */
__interrupt(vect=11) void INT_TimerA(void) {/* sleep(); */}

/*  vector 12 Counter Overflow */
__interrupt(vect=12) void INT_Counter(void) {/* sleep(); */}

/*  vector 13 Timer C Overflow */
__interrupt(vect=13) void INT_TimerC(void) {/* sleep(); */}

/*  vector 14 Timer FL Overflow */
__interrupt(vect=14) void INT_TimerFL(void) {/* sleep(); */}

/*  vector 15 Timer FH Overflow */
__interrupt(vect=15) void INT_TimerFH(void) {/* sleep(); */}

/*  vector 16 Timer G Overflow */
__interrupt(vect=16) void INT_TimerG(void) {/* sleep(); */}

/*  vector 17 SCI3_1 */
__interrupt(vect=17) void INT_SCI3_1(void) {/* sleep(); */}

/*  vector 18 SCI3_2 */
__interrupt(vect=18) void INT_SCI3_2(void) {/* sleep(); */}

/*  vector 19 ADI */
__interrupt(vect=19) void INT_ADI(void) {/* sleep(); */}

/*  vector 20 Direct Transition */
__interrupt(vect=20) void INT_Direct_Transition(void) {/* sleep(); */}