📄 smckxd.inc
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;***************************************************************************
;SMCKXD.INC - Generic Definition file for SMC 176-pin Keyboard & Auxiliary
; Device Controller with Internal ScanCode & PS/2 Mouse
; Controller.
;***************************************************************************
; Revision Information $Revision: 0.01 $
; $Date: 24-DEC-2004 18:34:07 $
;***************************************************************************
;-------------------------- VERSION INFO EQUATES ----------------------------
INFO1 equ 01110001b ; i51 family, Ext-INFOs,Scanner,PD,PS2 Env.(0xD6 cmd)
INFO3 equ 00010001b ; i51 family, EC Smart Battery (0xB0 cmd)
;INFO2 equ 10100000b ; IRQ12 software FF, IRQ1 software FF, Speed
INFO4 equ 00000001b ; Flash support, Matrix in ROM and RAM
INFO5 equ 00000000b ; reserved
;
; {INFO1} Version Information I {INFO2} Version Information II
; B7 - Processor Type (bit2) B7 - IRQ12 software Flip/Flop
; B6 - Extended INFO available (B0) B6 - IRQ12 software inverted
; B5 - Kbd Scanning support B5 - IRQ1 software Flip/Flop
; B4 - Power Down Support B4 - IRQ1 software inverted
; B3 - Processor Type (bit1) B3 - Clock speed (bit 3)
; B2 - PS/2 Mouse Emulation B2 - Clock speed (bit 2)
; B1 - AT Environment (0=PS/2) B1 - Clock speed (bit 1)
; B0 - Processor Type (bit0) B0 - Clock speed (bit 0)
;
; {INFO3} Version Information III {INFO4} Version Information IV
; B7 - Processor Type (bit3) B7 - Reserved
; B6 - Processor Type (bit2) B6 - Reserved
; B5 - Processor Type (bit1) B5 - Reserved
; B4 - Processor Type (bit0) B4 - Reserved
; B3 - Battery Type (bit3) B3 - TmpCfgMtx
; B2 - Battery Type (bit2) B2 - Fn-Shift Table in ROM only
; B1 - Battery Type (bit1) B1 - Matrix Located in ROM only
; B0 - Battery Type (bit0) B0 - EEPROM and B#h Cmd support
;
; {INFO5} Version Information V
; B7 - B0 - Reserved
;
; Processor Type: bit3 bit2 bit1 bit0 Battery Type: bit3 bit2 bit1 bit0
; M38802 0 0 0 0 No Battery 0 0 0 0
; 80C51SL 0 0 0 1 Duracell SMB 0 0 0 1
; SMC51xL 0 0 1 0 Sony SBP 0 0 1 0
; H8/3332 0 0 1 1 Sony SBP*2 0 0 1 1
; VL82C144 0 1 0 0 BQ High Speed 0 1 0 0
; 8042 0 1 0 1 Reserved 0 1 0 1
; Reserved 0 1 1 0 Reserved 0 1 1 0
; M3886X 0 1 1 1 Reserved 0 1 1 1
; M38813 1 0 0 0 Reserved 1 0 0 0
; SMC95x 1 0 0 1 Reserved 1 0 0 1
; PC87570 1 0 1 0 Reserved 1 0 1 0
; H8/3434 1 0 1 1 Reserved 1 0 1 1
; VL82C532 1 1 0 0 Reserved 1 1 0 0
; MC68405G11 1 1 0 1 Reserved 1 1 0 1
; Reserved 1 1 1 0 Reserved 1 1 1 0
; M306KX 1 1 1 1 Reserved 1 1 1 1
;
; Processor type of all non-SMsC 51 based core use 80C51SL type (0001).
; {INFO5} defines more processor information:
; 000h: reserved
; 001h: W83950D
;--------------------- BIT MASK EQUATES ------------------------------------
BIT7 equ 80h
BIT6 equ 40h
BIT5 equ 20h
BIT4 equ 10h
BIT3 equ 08h
BIT2 equ 04h
BIT1 equ 02h
BIT0 equ 01h
;
;--------------------- CLOCK AND TIMER RELATED EQUATES ----------------------
IF CLK32MHZ
T_INACT equ 0C8h ; loop count => (0.50us * 200) = 100us
T_380ms equ 0F0h ; Timer 1 Cycle Time = 0.50us @ 32MHz
T2_40ms equ 0EDh ; Timer value = XXXXXXXX00000000b
T5_00ms equ 0D9h ; 5ms parallel keyboard scanning timer
T12_0ms equ 0A2h ; 12ms delay count high byte value
T20_0ms equ 0B0h ; 20ms delay count high byte value
T25_0ms equ 0A0h ; 25ms delay count high byte value
INFO2 equ 00Eh ; IRQ12 software FF, IRQ1 software FF, speed
CLKVAL equ 003h shl 6 ;
ENDIF ;CLK32MHZ
IF CLK24MHZ
T_INACT equ 0C8h ; loop count => (0.50us * 200) = 100us
T_380ms equ 0FDh ; Timer 1 Cycle Time = 0.50us @ 24MHz
T2_40ms equ 0EDh ; Timer value = XXXXXXXX00000000b
T5_00ms equ 0D9h ; 5ms parallel keyboard scanning timer
T12_0ms equ 0A2h ; 12ms delay count high byte value
T20_0ms equ 0B0h ; 20ms delay count high byte value
T25_0ms equ 0A0h ; 25ms delay count high byte value
INFO2 equ 00Eh ; IRQ12 software FF, IRQ1 software FF, speed
CLKVAL equ 002h shl 6 ;
ENDIF ;CLK24MHZ
IF CLK16MHZ
T_INACT equ 086h ; loop count => (0.75us * 134) = 100.5us
T_380ms equ 0FEh ; Timer 1 Cycle Time = 0.75us @ 16MHz
T2_40ms equ 0F3h ; Timer value = XXXXXXXX00000000b
T5_00ms equ 0E6h ; 5ms parallel keyboard scanning timer
T12_0ms equ 0C1h ; 12ms delay count high byte value
T20_0ms equ 0B0h ; 20ms delay count high byte value
T25_0ms equ 0A0h ; 25ms delay count high byte value
INFO2 equ 000h ; IRQ12 hardware FF, IRQ1 hardware FF, speed
CLKVAL equ 001h shl 6 ;
ENDIF ;CLK16MHZ
IF CLK12MHZ
T_INACT equ 064h ; loop count => (1.00us * 100) = 100us
T_380ms equ 0FEh ; Timer 1 Cycle Time = 1.00us @ 12MHz
T2_40ms equ 0FAh ; Timer value = XXXXXXXX00000000b
T5_00ms equ 0ECh ; 5ms parallel keyboard scanning timer
T12_0ms equ 0D1h ; 12ms delay count high byte value
T20_0ms equ 0B0h ; 20ms delay count high byte value
T25_0ms equ 0A0h ; 25ms delay count high byte value
INFO2 equ 00Ch ; IRQ12 software FF, IRQ1 software FF, speed
CLKVAL equ 000h shl 6 ;
ENDIF ;CLK12MHZ
;-----------------------------------------------------------------------------
; Special Function Registers (SFR) Define
;-----------------------------------------------------------------------------
; Bit Addressable Special Function Registers */
SGPIOJ equ 080h ; Special GPIO J
SGPIOK equ 090h ; SPecial GPIO K
RBR equ 098h ;
THR equ 098h ;
DLL equ 098h ;
IE equ 0A8h ; Interupt Enable Register
IP equ 0B8h ; Interrupt polarity Control Register
tcon2 equ 0c8h ; Timer 2 Register
TR2 equ tcon2.2 ; Timer 2 start flag
TF2 equ tcon2.7 ; Timer 2 overflow flag
PSW equ 0D0h ; Processer status word register
EICON equ 0D8h ; External Intr control register
ACC equ 0E0h ; Acculator
EIE equ 0E8h ; External Interrupt enable register
B equ 0F0h ; Assist Acculator
EIP equ 0F8h ; External Intr polarity control register
;-----------------------------------------------------------------------------
; Byte Addressable Special Function Registers */
SP equ 081h ; Stack Pointer
dpl0 equ 082h ; Dtata Pointer Low Byte 0
dph0 equ 083h ; Dtata Pointer High Byte 0
dpl1 equ 084h ; new data pointer 1 low byte
dph1 equ 085h ; new data pointer 1 high byte
dps equ 086h ; new data pointer select byte
PCON equ 087h ; Processer Control Register
TCON equ 088h ; Timer Control Register
TMOD equ 089h ; Timer Mode Register
TL0 equ 08Ah ; Timer 0 Low Byte
TL1 equ 08Bh ; Timer 0 High Byte
TH0 equ 08Ch ; Timer 1 Low Byte
TH1 equ 08Dh ; Timer 1High Byte
CKCON equ 08Eh ; Clock COntrol Register
SPCFNC equ 08Fh ;
EXIF equ 091h ;
MPAGE equ 092h ; Memory Page Register
HKMEM equ 095h ;
LKMEM equ 096h ;
SPCR equ 097h ;
DLM equ 099h ;
IER equ 099h ; Interrupt Enable Register
IIR equ 09Ah ;
FCR equ 09Ah ;
LCRR equ 09Bh ;
MCR equ 09Ch ;
LSR equ 09Dh ;
SCR equ 09Fh ;
INTACC equ 0B9h ; Interrupt Accelerator Enable Register
INTVECT equ 0BAh ; Interrupt Vector Page Register
RCAP2L equ 0CAh ;
RCAP2H equ 0CBh ;
TL2 equ 0CCh ; Timer 2 Low Byte
TH2 equ 0CDh ; Timer 2 High Byte
;---------------------------------------------------------------------
; Memory Map Control Registers (MMCR) Define
;---------------------------------------------------------------------
;; External MMCR 7Fxxh
PFRSTS equ 7F00h ; Power Fail and Reset Status Register R/W
;---------------------------------------------------------------------
; KB Matrix Control
KBSCANO equ 7F04h ; Keyboard Scan-Out Register -/W
KBSCANI equ 7F04h ; Keyboard Scan-In Register R/-
;---------------------------------------------------------------------
; Device ID Control
DEVREV equ 7F06h ; Devices Revision Register R/-
DEVID equ 7F07h ; Devices ID Register R/-
;---------------------------------------------------------------------
; Mail Box Control 0
MBX_0 equ 7F08h ; Mail Box Register 0 : System to 8051 RC/-
MBX_1 equ 7F09h ; Mail Box Register 1 : 8051 to System R/W
MBX_2 equ 7F0Ah ; Mail Box Register 2 R/W
MBX_3 equ 7F0Bh ; Mail Box Register 3 R/W
MBX_4 equ 7F0Ch ; Mail Box Register 4 R/W
MBX_5 equ 7F0Dh ; Mail Box Register 5 R/W
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