📄 dp_rx_drv.lst
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00B6 900000 R MOV DPTR,#int1
00B9 E0 MOVX A,@DPTR
00BA FF MOV R7,A
00BB 7D01 MOV R5,#01H
00BD 120000 R LCALL _DP_RX_Interrupt_Debug_Info
; SOURCE LINE # 83
00C0 900000 R MOV DPTR,#int2
00C3 E0 MOVX A,@DPTR
00C4 FF MOV R7,A
00C5 7D02 MOV R5,#02H
00C7 120000 R LCALL _DP_RX_Interrupt_Debug_Info
; SOURCE LINE # 84
00CA 900000 R MOV DPTR,#int3
00CD E0 MOVX A,@DPTR
00CE FF MOV R7,A
00CF 7D03 MOV R5,#03H
00D1 120000 R LCALL _DP_RX_Interrupt_Debug_Info
; SOURCE LINE # 85
00D4 900000 R MOV DPTR,#int4
00D7 E0 MOVX A,@DPTR
00D8 FF MOV R7,A
00D9 7D04 MOV R5,#04H
00DB 120000 R LCALL _DP_RX_Interrupt_Debug_Info
; SOURCE LINE # 86
; SOURCE LINE # 87
00DE ?C0011:
00DE 22 RET
; FUNCTION DP_RX_Interrupt_Process (END)
; FUNCTION DP_RX_Timer_slot1 (BEGIN)
; SOURCE LINE # 90
; SOURCE LINE # 91
; SOURCE LINE # 93
0000 900000 R MOV DPTR,#DP_Rx_fw_state
0003 E0 MOVX A,@DPTR
0004 7003 JNZ ?C0012
; SOURCE LINE # 94
0006 120000 R LCALL DP_RX_CHK_Cable
0009 ?C0012:
; SOURCE LINE # 95
0009 900000 R MOV DPTR,#DP_Rx_fw_state
000C E0 MOVX A,@DPTR
000D B40103 CJNE A,#01H,?C0013
; SOURCE LINE # 96
0010 120000 R LCALL DP_RX_CHK_Link
C51 COMPILER V7.50 DP_RX_DRV 10/03/2008 17:53:10 PAGE 21
0013 ?C0013:
; SOURCE LINE # 97
0013 900000 R MOV DPTR,#DP_Rx_fw_state
0016 E0 MOVX A,@DPTR
0017 B40203 CJNE A,#02H,?C0015
; SOURCE LINE # 98
001A 120000 R LCALL DP_RX_Wait_Video
; SOURCE LINE # 99
001D ?C0015:
001D 22 RET
; FUNCTION DP_RX_Timer_slot1 (END)
; FUNCTION DP_RX_Timer_slot2 (BEGIN)
; SOURCE LINE # 101
; SOURCE LINE # 102
; SOURCE LINE # 103
0000 900000 R MOV DPTR,#DP_Rx_fw_state
0003 E0 MOVX A,@DPTR
0004 B40303 CJNE A,#03H,?C0017
; SOURCE LINE # 104
0007 120000 R LCALL DP_RX_PlayBack
; SOURCE LINE # 106
000A ?C0017:
000A 22 RET
; FUNCTION DP_RX_Timer_slot2 (END)
; FUNCTION DP_RX_SL_CR_AL_State_Checking (BEGIN)
; SOURCE LINE # 108
; SOURCE LINE # 109
; SOURCE LINE # 113
0000 7B01 MOV R3,#01H
0002 7A00 R MOV R2,#HIGH cstat2
0004 7900 R MOV R1,#LOW cstat2
0006 7F0C MOV R7,#0CH
0008 120000 R LCALL _DP_RX_ReadI2C_RX0
; SOURCE LINE # 114
000B 900000 R MOV DPTR,#cstat2
000E E0 MOVX A,@DPTR
000F 20E509 JB ACC.5,?C0018
; SOURCE LINE # 115
; SOURCE LINE # 116
0012 7BFF MOV R3,#0FFH
0014 7A00 R MOV R2,#HIGH ?SC_35
0016 7900 R MOV R1,#LOW ?SC_35
; SOURCE LINE # 117
; SOURCE LINE # 118
0018 020000 R LJMP ?C0127
001B ?C0018:
; SOURCE LINE # 120
; SOURCE LINE # 122
001B 7B01 MOV R3,#01H
001D 7A00 R MOV R2,#HIGH cLane_cnt
001F 7900 R MOV R1,#LOW cLane_cnt
0021 7F0B MOV R7,#0BH
0023 120000 R LCALL _DP_RX_ReadI2C_RX1
; SOURCE LINE # 123
0026 900000 R MOV DPTR,#cLane_cnt
0029 E0 MOVX A,@DPTR
002A 540F ANL A,#0FH
002C 6404 XRL A,#04H
002E 7030 JNZ ?C0020
; SOURCE LINE # 124
C51 COMPILER V7.50 DP_RX_DRV 10/03/2008 17:53:10 PAGE 22
; SOURCE LINE # 125
0030 7B01 MOV R3,#01H
0032 7A00 R MOV R2,#HIGH cstat1
0034 7900 R MOV R1,#LOW cstat1
0036 7F0B MOV R7,#0BH
0038 120000 R LCALL _DP_RX_ReadI2C_RX0
; SOURCE LINE # 126
003B 7B01 MOV R3,#01H
003D 7A00 R MOV R2,#HIGH cstat2
003F 7900 R MOV R1,#LOW cstat2
0041 7F0C MOV R7,#0CH
0043 120000 R LCALL _DP_RX_ReadI2C_RX0
; SOURCE LINE # 128
0046 900000 R MOV DPTR,#cstat1
0049 E0 MOVX A,@DPTR
004A 5403 ANL A,#03H
004C FF MOV R7,A
004D BF0308 CJNE R7,#03H,?C0022
0050 A3 INC DPTR
0051 E0 MOVX A,@DPTR
0052 54C0 ANL A,#0C0H
0054 64C0 XRL A,#0C0H
0056 6052 JZ ?C0030
0058 ?C0022:
; SOURCE LINE # 129
; SOURCE LINE # 130
0058 7BFF MOV R3,#0FFH
005A 7A00 R MOV R2,#HIGH ?SC_46
005C 7900 R MOV R1,#LOW ?SC_46
005E ?C0125:
; SOURCE LINE # 131
; SOURCE LINE # 132
; SOURCE LINE # 133
005E 8044 SJMP ?C0127
0060 ?C0020:
; SOURCE LINE # 134
0060 900000 R MOV DPTR,#cLane_cnt
0063 E0 MOVX A,@DPTR
0064 540F ANL A,#0FH
0066 FF MOV R7,A
0067 6402 XRL A,#02H
0069 6005 JZ ?C0025
006B EF MOV A,R7
006C 6401 XRL A,#01H
006E 703A JNZ ?C0030
0070 ?C0025:
; SOURCE LINE # 135
; SOURCE LINE # 136
0070 7B01 MOV R3,#01H
0072 7A00 R MOV R2,#HIGH cstat1
0074 7900 R MOV R1,#LOW cstat1
0076 7F0C MOV R7,#0CH
0078 120000 R LCALL _DP_RX_ReadI2C_RX0
; SOURCE LINE # 137
007B 900000 R MOV DPTR,#cLane_cnt
007E E0 MOVX A,@DPTR
007F 540F ANL A,#0FH
0081 FF MOV R7,A
0082 BF0212 CJNE R7,#02H,?C0026
; SOURCE LINE # 138
; SOURCE LINE # 139
0085 900000 R MOV DPTR,#cstat2
C51 COMPILER V7.50 DP_RX_DRV 10/03/2008 17:53:10 PAGE 23
0088 E0 MOVX A,@DPTR
0089 54C0 ANL A,#0C0H
008B 64C0 XRL A,#0C0H
008D 601B JZ ?C0030
; SOURCE LINE # 140
; SOURCE LINE # 141
008F 7BFF MOV R3,#0FFH
0091 7A00 R MOV R2,#HIGH ?SC_46
0093 7900 R MOV R1,#LOW ?SC_46
0095 ?C0126:
; SOURCE LINE # 142
; SOURCE LINE # 143
; SOURCE LINE # 144
0095 800D SJMP ?C0127
0097 ?C0026:
; SOURCE LINE # 146
; SOURCE LINE # 147
0097 900000 R MOV DPTR,#cstat2
009A E0 MOVX A,@DPTR
009B 20E60C JB ACC.6,?C0030
; SOURCE LINE # 148
; SOURCE LINE # 149
009E 7BFF MOV R3,#0FFH
00A0 7A00 R MOV R2,#HIGH ?SC_46
00A2 7900 R MOV R1,#LOW ?SC_46
00A4 ?C0127:
00A4 120000 E LCALL _debug_puts
; SOURCE LINE # 150
00A7 120000 R LCALL DP_RX_HPD_Update_Status
; SOURCE LINE # 151
; SOURCE LINE # 152
; SOURCE LINE # 153
; SOURCE LINE # 154
; SOURCE LINE # 155
00AA ?C0030:
00AA 22 RET
; FUNCTION DP_RX_SL_CR_AL_State_Checking (END)
; FUNCTION DP_RX_HPD_Update_Status (BEGIN)
; SOURCE LINE # 157
; SOURCE LINE # 158
; SOURCE LINE # 160
0000 C2AA CLR EX1
; SOURCE LINE # 162
0002 7F02 MOV R7,#02H
0004 120000 R LCALL _DP_RX_Set_FW_State
; SOURCE LINE # 163
0007 7DFD MOV R5,#0FDH
0009 7FCE MOV R7,#0CEH
000B 120000 R LCALL _DP_RX_WriteI2C_RX0
; SOURCE LINE # 164
000E 7B01 MOV R3,#01H
0010 7A00 R MOV R2,#HIGH c
0012 7900 R MOV R1,#LOW c
0014 7F0C MOV R7,#0CH
0016 120000 R LCALL _DP_RX_ReadI2C_RX1
; SOURCE LINE # 165
0019 900000 R MOV DPTR,#c
001C E0 MOVX A,@DPTR
001D 4402 ORL A,#02H
001F FD MOV R5,A
0020 7F0C MOV R7,#0CH
C51 COMPILER V7.50 DP_RX_DRV 10/03/2008 17:53:10 PAGE 24
0022 120000 R LCALL _DP_RX_WriteI2C_RX1
; SOURCE LINE # 167
0025 E4 CLR A
0026 FF MOV R7,A
0027 120000 E LCALL _DP_RX_HPD
; SOURCE LINE # 168
002A 120000 E LCALL delay_half_ms
; SOURCE LINE # 169
002D 7F01 MOV R7,#01H
002F 120000 E LCALL _DP_RX_HPD
; SOURCE LINE # 170
0032 7DF9 MOV R5,#0F9H
0034 7FCE MOV R7,#0CEH
0036 020000 R LJMP _DP_RX_WriteI2C_RX0
; FUNCTION DP_RX_HPD_Update_Status (END)
; FUNCTION _DP_RX_Set_Lane_Count (BEGIN)
; SOURCE LINE # 174
0000 900000 R MOV DPTR,#lanecount
0003 EF MOV A,R7
0004 F0 MOVX @DPTR,A
; SOURCE LINE # 175
; SOURCE LINE # 177
0005 7B01 MOV R3,#01H
0007 7A00 R MOV R2,#HIGH c
0009 7900 R MOV R1,#LOW c
000B 7F03 MOV R7,#03H
000D 120000 R LCALL _DP_RX_ReadI2C_RX1
; SOURCE LINE # 178
0010 900000 R MOV DPTR,#c
0013 E0 MOVX A,@DPTR
0014 54F0 ANL A,#0F0H
0016 FF MOV R7,A
0017 900000 R MOV DPTR,#lanecount
001A E0 MOVX A,@DPTR
001B 4F ORL A,R7
001C FD MOV R5,A
001D 7F03 MOV R7,#03H
001F 120000 R LCALL _DP_RX_WriteI2C_RX1
; SOURCE LINE # 179
0022 900000 R MOV DPTR,#lanecount
0025 E0 MOVX A,@DPTR
0026 FD MOV R5,A
0027 7F0B MOV R7,#0BH
0029 020000 R LJMP _DP_RX_WriteI2C_RX1
; FUNCTION _DP_RX_Set_Lane_Count (END)
; FUNCTION _DP_RX_Set_BandWidth (BEGIN)
; SOURCE LINE # 182
0000 900000 R MOV DPTR,#bandwidth
0003 EF MOV A,R7
0004 F0 MOVX @DPTR,A
0005 FD MOV R5,A
; SOURCE LINE # 183
; SOURCE LINE # 184
0006 7F0⌨️ 快捷键说明
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