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📄 dp_rx_drv.lst

📁 display port接受芯片ANX9813的驱动代码。MCU使用LPC936FDH,内部包含AN9813寄存器设置
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             -~~~~~~~~~~~~~ .");
 566   1              if (c & 0x08)
 567   1                  B_puts("Int info: D10.2 test pattern.");
 568   1              if (c & 0x10)
 569   1                  B_puts("Int info: Error rate measurement pattern.");
 570   1              if (c & 0x20)
 571   1                  B_puts("Int info: PRBS 7 test pattern.");
 572   1      
 573   1              if (c & 0x40)
 574   1                  B_puts("Int info: VSYNC has detected.");
 575   1                      
 576   1              if (c & 0x80)
 577   1                  B_puts("Int info: Reserved.");
 578   1              break;
 579   1              case 4:
 580   1              if (c & 0x01)
 581   1                  B_puts("Int info: HDCP_SHA_READY.");
 582   1              if (c & 0x02)
 583   1                  B_puts("Int info: main attribute data lose.");
 584   1              if (c & 0x04)
 585   1                  B_puts("Int info: The major voting error of VB_ID or Mvid or Maud.");
 586   1      
 587   1               if (c & 0x08)
 588   1                  B_puts("Int info: FIFO error.");
 589   1                      
 590   1              if (c & 0x10)
 591   1                  B_puts("Int info: HDCP_AUTH_OK.");
 592   1              if (c & 0x20)
 593   1                  B_puts("Int info: HDCP_AUTH_START.");
 594   1              if (c & 0x40)
 595   1                  B_puts("Int info: HDCP_LINK_FAILURE.");
 596   1              if (c & 0x80)
 597   1                  B_puts("Int info: HDCP_R0_AVAILABLE.");
 598   1              break;
 599   1          }
 600   1          */
 601   1      }
*** WARNING C280 IN LINE 514 OF DP_RX_DRV.C: 'c': unreferenced local variable
*** WARNING C280 IN LINE 514 OF DP_RX_DRV.C: 'n': unreferenced local variable
 602          void DP_RX_Show_Vid_Info(void)
 603          {
 604   1         /* BYTE c,cv;
 605   1          long int M_val,N_val,str_clk,temp;
 606   1          
 607   1          // horizontal resolution
 608   1          DP_RX_ReadI2C_RX0(ACT_PIX_HIGH, &cv);
C51 COMPILER V7.50   DP_RX_DRV                                                             10/03/2008 17:53:10 PAGE 11  

 609   1          s_dp_rx.cur_h_res = (cv<<8);
 610   1          DP_RX_ReadI2C_RX0(ACT_PIX_LOW, &cv);
 611   1          s_dp_rx.cur_h_res += cv;
 612   1      
 613   1          // vertical resoltuion
 614   1          DP_RX_ReadI2C_RX0(ACT_LINE_HIGH, &cv);
 615   1          s_dp_rx.cur_v_res = (cv<<8);
 616   1          DP_RX_ReadI2C_RX0(ACT_LINE_LOW, &cv);
 617   1          s_dp_rx.cur_v_res += cv;
 618   1      
 619   1         
 620   1          B_puts("*********************** Show Chip Info *************************");
 621   1      
 622   1          DP_RX_ReadI2C_RX1(LINK_BW_SET, &c);
 623   1          if(c == LINK_1D62G)
 624   1          {
 625   1              B_puts("The link bandwidth is 1.62G.");
 626   1              str_clk = 162;
 627   1          }
 628   1          else
 629   1          {
 630   1              B_puts("The link bandwidth is 2.7G.");
 631   1              str_clk = 270;
 632   1          }
 633   1      
 634   1          // stream clock
 635   1          DP_RX_ReadI2C_RX0(M_FORCE_VALUE_3, &cv);
 636   1          M_val = cv * 0x10000;
 637   1          DP_RX_ReadI2C_RX0(M_FORCE_VALUE_2, &cv);
 638   1          M_val = cv * 0x100;
 639   1          DP_RX_ReadI2C_RX0(M_FORCE_VALUE_1, &cv);
 640   1          M_val = M_val + cv;
 641   1      
 642   1          DP_RX_ReadI2C_RX0(N_FORCE_VALUE_3, &cv);
 643   1          N_val = cv * 0x10000;
 644   1          DP_RX_ReadI2C_RX0(N_FORCE_VALUE_2, &cv);
 645   1          N_val = cv * 0x100;
 646   1          DP_RX_ReadI2C_RX0(N_FORCE_VALUE_1, &cv);
 647   1          N_val = N_val + cv;
 648   1      
 649   1          str_clk = str_clk * M_val;
 650   1          str_clk = str_clk / N_val;
 651   1              
 652   1          debug_printf("Input stream clock = %lu,    M = %lu, N = %lu\n",str_clk,M_val,N_val);
 653   1      
 654   1          // video type is progressive or interlace 
 655   1          DP_RX_ReadI2C_RX0(SYNC_STATUS, &cv);
 656   1          
 657   1          if(cv & 0x04)
 658   1          {
 659   1              B_puts("Video format is interlace.");
 660   1              s_dp_rx.cur_v_res *= 2;
 661   1          }
 662   1          else
 663   1          {
 664   1              B_puts("Video format is progressive.");
 665   1          }
 666   1          
 667   1          debug_printf("Recover Resolution is %d * %d \n",
 668   1                          s_dp_rx.cur_h_res,s_dp_rx.cur_v_res);
 669   1          B_puts("Counting link error for one second...");
 670   1          DP_RX_8B10B_Err_Chk(1);
C51 COMPILER V7.50   DP_RX_DRV                                                             10/03/2008 17:53:10 PAGE 12  

 671   1          B_puts("-----------------------------------------------------------");
 672   1          DP_RX_ReadI2C_RX0(0x1f, &c);
 673   1          if(c&0x01)
 674   1              B_puts("Source detection(0x50:0x1f) detects High");
 675   1          else
 676   1              B_puts("Source detection(0x50:0x1f) detects Low");
 677   1          DP_RX_ReadI2C_RX0(0x13, &c);
 678   1          if(c&0x08)
 679   1              B_puts("(0x50:0x13) No video stream is transported.");
 680   1          // horizontal total
 681   1          DP_RX_ReadI2C_RX0(0x24, &c);
 682   1          h_total_main = c;
 683   1          h_total_main = h_total_main << 8;
 684   1          DP_RX_ReadI2C_RX0(0x25, &c);
 685   1          h_total_main = h_total_main+c;
 686   1          //v total
 687   1          DP_RX_ReadI2C_RX0(0x2e, &c);
 688   1          v_total_main = c;
 689   1          v_total_main = v_total_main << 8;
 690   1          DP_RX_ReadI2C_RX0(0x2f, &c);
 691   1          v_total_main = v_total_main+c;
 692   1          //hsync width
 693   1          DP_RX_ReadI2C_RX0(0x22, &c);
 694   1          if(c&0x80)
 695   1              B_puts("HSYNC polarity is Negative");
 696   1          else
 697   1              B_puts("HSYNC polarity is Positive");
 698   1          hsync_wid_main = c & 0x7f;
 699   1          hsync_wid_main = hsync_wid_main << 8;
 700   1          DP_RX_ReadI2C_RX0(0x23, &c);
 701   1          hsync_wid_main = hsync_wid_main+c;
 702   1          //vsync width
 703   1          DP_RX_ReadI2C_RX0(0x2c, &c);
 704   1          if(c&0x80)
 705   1              B_puts("VSYNC polarity is Negative");
 706   1          else
 707   1              B_puts("VSYNC polarity is Positive");
 708   1          vsync_wid_main = c & 0x7f;
 709   1          vsync_wid_main = vsync_wid_main << 8;
 710   1          DP_RX_ReadI2C_RX0(0x2d, &c);
 711   1          vsync_wid_main = vsync_wid_main+c;
 712   1          //h_bp
 713   1          DP_RX_ReadI2C_RX0(0x20, &c);
 714   1          temp = c;
 715   1          temp = temp << 8;
 716   1          DP_RX_ReadI2C_RX0(0x21, &c);
 717   1          temp = temp+c;
 718   1          h_bp_main = temp - hsync_wid_main;
 719   1             //v_bp
 720   1          DP_RX_ReadI2C_RX0(0x2a, &c);
 721   1          temp = c;
 722   1          temp = temp << 8;
 723   1          DP_RX_ReadI2C_RX0(0x2b, &c);
 724   1          temp = temp+c;
 725   1          v_bp_main = temp - vsync_wid_main;
 726   1          // horizontal resolution
 727   1          DP_RX_ReadI2C_RX0(0x26, &c);
 728   1          h_main = c;
 729   1          h_main = h_main << 8;
 730   1          DP_RX_ReadI2C_RX0(0x27, &c);
 731   1          h_main = h_main+c;
 732   1      
C51 COMPILER V7.50   DP_RX_DRV                                                             10/03/2008 17:53:10 PAGE 13  

 733   1          // vertical resoltuion
 734   1          DP_RX_ReadI2C_RX0(0x28, &c);
 735   1          v_main = c;
 736   1          v_main = v_main<<8;;
 737   1          DP_RX_ReadI2C_RX0(0x29, &c);
 738   1          v_main = v_main+c;
 739   1                 //h_fp
 740   1          h_fp_main = h_total_main - (h_main + h_bp_main + hsync_wid_main);
 741   1                 //v_fp
 742   1          v_fp_main = v_total_main - (v_main + v_bp_main + vsync_wid_main);
 743   1      
 744   1          debug_printf("Active Resolution from Main Attribute is %d * %d \n",h_main, v_main);
 745   1          debug_printf("Total Resolution from Main Attribute is %d * %d \n",h_total_main, v_total_main);
 746   1          debug_printf("HSYNC width from Main Attribute is %d \n",hsync_wid_main);
 747   1          debug_printf("H_front porch from Main Attribute is %d \n",h_fp_main);
 748   1          debug_printf("H_back porch from Main Attribute is %d \n",h_bp_main);
 749   1          debug_printf("VSYNC width from Main Attribute is %d \n",vsync_wid_main);
 750   1          debug_printf("V_front porch from Main Attribute is %d \n",v_fp_main);
 751   1          debug_printf("V_back porch from Main Attribute is %d \n",v_bp_main);
 752   1          DP_RX_ReadI2C_RX0(0xc3,&c);
 753   1          if(c&0x04)
 754   1              B_puts("(0x50:0xc3) AUX CH request timeout(>200us)");
 755   1          if(c&0x02)
 756   1              B_puts("AUX CH Manchester II decode error");
 757   1          if(c&0x01)
 758   1              B_puts("AUX CH request length error");
 759   1          if((c & 0x07)==0)
 760   1              B_puts("(0x50:0xc3) AUX CH no error");
 761   1          DP_RX_ReadI2C_RX0(0xc4,&c);
 762   1          if(c&0x04)
 763   1              B_puts("(0x50:0xc4) I2C master received No ACK");
 764   1          if(c&0x02)
 765   1              B_puts("I2C master is free");
 766   1          else
 767   1              B_puts("I2C master is busy");
 768   1          if(c&0x01)
 769   1              B_puts("I2C master lost arbitrary");
 770   1          DP_RX_ReadI2C_RX0(0xda,&c);
 771   1          debug_printf("(0x50:0xda) BOOST1_CH0 = %.2x\n", (WORD)((c>>3)&0x07));
 772   1          debug_printf("(0x50:0xda) BOOST1_CH1 = %.2x\n", (WORD)(c&0x07));
 773   1          DP_RX_ReadI2C_RX0(0xdb,&c);
 774   1          debug_printf("(0x50:0xdb) BOOST1_CH2 = %.2x\n", (WORD)((c>>3)&0x07));
 775   1          debug_printf("(0x50:0xdb) BOOST1_CH3 = %.2x\n", (WORD)(c&0x07));
 776   1          DP_RX_ReadI2C_RX0(0xdc,&c);
 777   1          debug_printf("(0x50:0xdc) BOOST2_CH0 = %.2x\n", (WORD)((c>>3)&0x07));
 778   1          debug_printf("(0x50:0xdc) BOOST2_CH1 = %.2x\n", (WORD)(c&0x07));
 779   1          DP_RX_ReadI2C_RX0(0xdd,&c);
 780   1          debug_printf("(0x50:0xdd) BOOST2_CH2 = %.2x\n", (WORD)((c>>3)&0x07));
 781   1          debug_printf("(0x50:0xdd) BOOST2_CH3 = %.2x\n", (WORD)(c&0x07));
 782   1          DP_RX_ReadI2C_RX0(0xde,&c);
 783   1          debug_printf("(0x50:0xde) GAIN1_CH0 = %.2x\n", (WORD)((c>>3)&0x03));
 784   1          debug_printf("(0x50:0xde) GAIN1_CH1 = %.2x\n", (WORD)(c&0x03));
 785   1          DP_RX_ReadI2C_RX0(0xdf,&c);
 786   1          debug_printf("(0x50:0xdf) GAIN1_CH2 = %.2x\n", (WORD)((c>>3)&0x03));
 787   1          debug_printf("(0x50:0xdf) GAIN1_CH3 = %.2x\n", (WORD)(c&0x03));
 788   1          DP_RX_ReadI2C_RX0(0xe7,&c);
 789   1          debug_printf("(0x50:0xe7) GAIN2_CH0 = %.2x\n", (WORD)((c>>3)&0x03));
 790   1          debug_printf("(0x50:0xe7) GAIN2_CH1 = %.2x\n", (WORD)(c&0x03));
 791   1          DP_RX_ReadI2C_RX0(0xe8,&c);
 792   1          debug_printf("(0x50:0xe8) GAIN2_CH2 = %.2x\n", (WORD)((c>>3)&0x03));
 793   1          debug_printf("(0x50:0xe8) GAIN2_CH3 = %.2x\n", (WORD)(c&0x03));
 794   1          B_puts("*****************************************************************");
C51 COMPILER V7.50   DP_RX_DRV                                                             10/03/2008 17:53:10 PAGE 14  

 795   1      */}
 796          
 797          
 798          void DP_RX_Cable_Lost_Int(void)
 799          {
 800   1          DP_RX_WriteI2C_RX0(PWD_REG,0x80);    
 801   1          DP_RX_Set_FW_State(STATE_WAIT_HPD);
 802   1          B_puts("HPD Lost, power down DP lanes.");
 803   1          // Interrupt register mask configuration. 
 804   1          DP_RX_WriteI2C_RX0(INTR_MASK_1, 0xff);
 805   1          DP_RX_WriteI2C_RX0(INTR_MASK_2, 0xff);
 806   1          DP_RX_WriteI2C_RX0(INTR_MASK_3, 0xff);
 807   1          DP_RX_WriteI2C_RX0(INTR_MASK_4, 0xff);
 808   1          DP_RX_HPD(0);
 809   1      }
 810          
 811          void DP_RX_Vid_Change_Int(void)
 812          {
 813   1          if((DP_Rx_fw_state != STATE_WAIT_HPD) && (DP_Rx_fw_state != STATE_CHK_LINK))
 814   1          {
 815   2              B_puts("Video format is changed.");
 816   2              //DP_RX_Mute_Vid();
 817   2              DP_RX_Set_FW_State(STATE_WAIT_VIDEO);
 818   2          }
 819   1      }
 820          
 821          void DP_RX_Link_Err_Int(void)
 822          {
 823   1      
 824   1          if((DP_Rx_fw_state != STATE_WAIT_HPD) && (DP_Rx_fw_state != STATE_CHK_LINK))
 825   1          {
 826   2              B_puts("link is unstable.");
 827   2              DP_RX_Set_FW_State(STATE_WAIT_VIDEO);
 828   2          }
 829   1      }
 830          
 831          void DP_RX_Data_RCV_Int(void)
 832          {
 833   1          if((DP_Rx_fw_state != STATE_WAIT_VIDEO) && (DP_Rx_fw_state != STATE_PLAY_BACK))
 834   1          {
 835   2              DP_RX_WriteI2C_RX0(PWD_REG, 0x00);
 836   2              DP_RX_WriteI2C_RX0(INTR_MASK_3, 0xf9);
 837   2              DP_RX_Set_FW_State(STATE_WAIT_VIDEO);
 838   2              DP_RX_WriteI2C_RX0(INTR_MASK_1, 0xf9);
 839   2          }
 840   1      }
 841          
 842          void DP_RX_Set_FW_State(BYTE fw_state)
 843          {
 844   1      
 845   1          DP_Rx_fw_state = fw_state;
 846   1          //debug_printf("DP_RX ");
 847   1          switch (DP_Rx_fw_state)
 848   1          {
 849   2              case STATE_WAIT_HPD:
 850   2                  B_puts("to sys state STATE_WAIT_HPD");
 851   2                  break;

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