swatch.vhd

swatch - quartus2 vhdl

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity swatch is
	port (	clk	: in bit;
			clear : in bit;
			seg : buffer std_logic_vector (7 downto 0);
			seg_com : buffer std_logic_vector (0 to 7);
			sw_a, sw_b , sw_c, sw_d, sw_e, sw_f : in std_logic);
end swatch;

architecture arc of swatch is
	signal seg3, seg4 : std_logic_vector(7 downto 0);
	signal seg5, seg6 : std_logic_vector(7 downto 0);
	signal seg7, seg8 : std_logic_vector(7 downto 0);
	signal sec :integer range 0 to 59;
	signal min : integer range 0 to 59;
	signal hour : integer range 0 to 23;
	signal cnt : integer range 0 to 999;
	signal dot : std_logic_vector(7 downto 0);
	signal minp : integer range 0 to 59;
	signal hourp :integer range 0 to 23;
	signal secp : integer range 0 to 59;
	signal mode : std_logic_vector (0 to 2);
	signal botton1, botton2 : std_logic;
	signal sw11, sw12, sw13, sw21, sw22, sw23: std_logic;

	function seven (display : integer range 0 to 10)
	return std_logic_vector is
	variable seg_data : std_logic_vector(7 downto 0);
	begin
				case display is
					when 0 => seg_data := x"3f";
					when 1 => seg_data := x"06";
					when 2 => seg_data := x"5b";
					when 3 => seg_data := x"4f";
					when 4 => seg_data := x"66";
					when 5 => seg_data := x"6d";
					when 6 => seg_data := x"7d";
					when 7 => seg_data := x"27";
					when 8 => seg_data := x"7f";
					when 9 => seg_data := x"67";
					when others => seg_data := x"00";
				end case;
				return seg_data;
	end seven;
begin
	process(sw11, sw12, sw13)
	begin
		if clk='1' and clk'event then
			sw11<=sw_c;
			sw12<=sw11;
			if sw11='1' and sw12='0' then
				sw13<=not sw13;
			end if;
		elsif clk='1' and clk'event then
			sw21<=sw_e;
			sw22<=sw21;
			if sw21='1' and sw22='0' then
				sw23<= '1';
			else
				sw23<='0';
			end if;
			
	end if;
	end process;

	process (clear, clk, cnt, min, hour, sw_a)
	begin
			
		if clear = '1' then
			sec <= 0;
			min <= 0;
			hour <= 0;
		elsif clk'event and clk='1' and sw_a='1' then
			if (cnt >=999) then
					cnt <= 0;
					sec<=sec+1;
					if(sec>=59) then 
						sec<=0;
						min<=min+1;
						if(min>=59) then
							min<=0;
							hour<=hour+1;
							if(hour>=23) then
								hour<=0;
							end if;
						end if;
					end if;
			else
				cnt <= cnt+1;
			end if;
			if (cnt < 500) then
				dot <=x"00";
			else 
				dot <=x"80";
			end if;
		end if;
	
		if sw_b='1' then
			mode<="100";
			hour<=hourp;
		end if;
		if sw_d='1' then
			mode<="010";
			min<=minp;
		end if;
		if sw_f='1' then
			mode<="001";
			sec<=secp;
		end if;
		
	end process;
	process(sw_c, sw_e)
		begin
		if sw13='1' then
			botton1<='1';
		else
			botton1<='0';
		end if;
		if sw23='1' then
			botton2<='1';
		else 
			botton2<='0';
		end if;
	end process;
	process(botton1, botton2)
	begin
		if botton1='1' then
			if mode="100" then
				hourp<=hourp+1;
				if hourp>=23 then
					hourp<=0;
				end if;
			elsif mode="010" then
				minp<=minp+1;
				if minp>=59 then
					minp<=0;
				end if;
			elsif mode="010" then
				secp<=secp+1;
				if secp>=59 then
					secp<=0;
				end if;
			end if;
		
	
		elsif botton2='1' then
			if mode="100" then
				hourp<=hourp-1;
				if 0>=hourp then
					hourp<=23;
				end if;
			elsif mode="010" then
				minp<=minp-1;
				if 0>=minp then
					minp<=59;
				end if;
			elsif mode="010" then
				secp<=secp-1;
				if 0>=secp then
					secp<=59;
				end if;
			end if;
		end if;
	end process;
	

		
	

	
	

	
	process (clear, clk, seg_com, seg3, seg4, seg5, seg6, seg7, seg8)
	begin
		if clear='1' then
			seg_com(0 to 7) <= "11111110";
		elsif clk'event and clk='1' then
			if(seg_com="11011111") then
				seg_com(0 to 7)<="11111110";
			else
				seg_com(0 to 7) <= seg_com(1 to 7) & '1';
			end if;
		end if;
		case seg_com is
			when "11111110" =>seg(7 downto 0) <= seg8;
			when "11111101" =>seg(7 downto 0) <= seg7;
			when "11111011" =>seg(7 downto 0) <= seg6;
			when "11110111" =>seg(7 downto 0) <= seg5;
			when "11101111" =>seg(7 downto 0) <= seg4;
			when others =>seg(7 downto 0) <= seg3;
		end case;
	end process;
	
	seg3<=seven(hour/10);
	seg4<=seven(hour mod 10)+dot;
	seg5<=seven(min/10);
	seg6<=seven(min mod 10)+dot;
	seg7<=seven(sec/10);
	seg8<=seven(sec mod 10)+dot;
	
end arc;