📄 leson3.lis
字号:
.module leson3.c
.area text(rom, con, rel)
0000 .dbfile F:\lesson\leson3.c
0000 .dbfunc e WDT_off _WDT_off fV
.even
0000 _WDT_off::
0000 .dbline -1
0000 .dbline 10
0000 ; #include <io2313v.h>
0000 ; #include <macros.h>
0000 ; #define uint unsigned int
0000 ; #define uchar unsigned char
0000 ;
0000 ;
0000 ;
0000 ;
0000 ; void WDT_off(void)
0000 ; {
0000 .dbline 14
0000 ; //__disable_interrupt();
0000 ; //__watchdog_reset();
0000 ; //#asm("cli");
0000 ; SREG &= ~0x80;
0000 F894 bclr 7
0002 .dbline 16
0002 ; // Clear WDRF in MCUSR
0002 ; MCUSR &= ~0x08;
0002 84B7 in R24,0x34
0004 877F andi R24,247
0006 84BF out 0x34,R24
0008 .dbline 19
0008 ; // Write logical one to WDCE and WDE
0008 ; // Keep old prescaler setting to prevent unintentional time-out
0008 ; WDTCSR |= 0x18;
0008 81B5 in R24,0x21
000A 8861 ori R24,24
000C 81BD out 0x21,R24
000E .dbline 21
000E ; // Turn off WDT
000E ; WDTCSR = 0x00;
000E 2224 clr R2
0010 21BC out 0x21,R2
0012 .dbline 22
0012 ; SREG |= 0x80;
0012 7894 bset 7
0014 .dbline -2
0014 L1:
0014 .dbline 0 ; func end
0014 0895 ret
0016 .dbend
0016 .dbfunc e USART_Init _USART_Init fV
0016 ; baud -> R16,R17
.even
0016 _USART_Init::
0016 .dbline -1
0016 .dbline 28
0016 ; //#asm("sei");
0016 ; //__enable_interrupt();
0016 ; }
0016 ;
0016 ; void USART_Init(unsigned int baud)
0016 ; {
0016 .dbline 30
0016 ; /* Set baud rate */
0016 ; UBRRH = (unsigned char)(baud>>8);
0016 202E mov R2,R16
0018 312E mov R3,R17
001A 232C mov R2,R3
001C 3324 clr R3
001E 22B8 out 0x2,R2
0020 .dbline 31
0020 ; UBRRL = (unsigned char)baud;
0020 09B9 out 0x9,R16
0022 .dbline 33
0022 ; /* Enable receiver and transmitter */
0022 ; UCSRB = 0x18;
0022 88E1 ldi R24,24
0024 8AB9 out 0xa,R24
0026 .dbline 35
0026 ; /* Set frame format: 8data, 2stop bit */
0026 ; UCSRC = 0x0E;
0026 8EE0 ldi R24,14
0028 83B9 out 0x3,R24
002A .dbline -2
002A L2:
002A .dbline 0 ; func end
002A 0895 ret
002C .dbsym r baud 16 i
002C .dbend
002C .dbfunc e USART_Transmit _USART_Transmit fV
002C ; data -> R16
.even
002C _USART_Transmit::
002C .dbline -1
002C .dbline 41
002C ; //U2X=0;
002C ; }
002C ;
002C ;
002C ; void USART_Transmit( unsigned char data )
002C ; {
002C L4:
002C .dbline 43
002C L5:
002C .dbline 43
002C ; /* Wait for empty transmit buffer */
002C ; while ( !( UCSRA & (UCSRA&0x20)) );
002C 8BB1 in R24,0xb
002E 8072 andi R24,32
0030 2BB0 in R2,0xb
0032 2822 and R2,R24
0034 D9F3 breq L4
0036 .dbline 45
0036 ; /* Put data into buffer, sends the data */
0036 ; UDR = data; //Transmit 8 data bits
0036 0CB9 out 0xc,R16
0038 .dbline -2
0038 L3:
0038 .dbline 0 ; func end
0038 0895 ret
003A .dbsym r data 16 c
003A .dbend
003A .dbfunc e USART_Receive _USART_Receive fc
.even
003A _USART_Receive::
003A .dbline -1
003A .dbline 64
003A ; }
003A ;
003A ; /*
003A ; void USART_Transmit( unsigned int data )
003A ; {
003A ; //Wait for empty transmit buffer
003A ; while (!( UCSRA & (1<<UDRE)));
003A ; // Copy 9th bit to TXB8
003A ; UCSRB &= ~(1<<TXB8);
003A ; if ( data & 0x0100 )
003A ; UCSRB |= (1<<TXB8);
003A ; // Put data into buffer, sends the data
003A ; UDR = data; //Transmit 9 data bits
003A ; }
003A ; */
003A ;
003A ;
003A ; unsigned char USART_Receive( void )
003A ; {
003A L8:
003A .dbline 66
003A L9:
003A .dbline 66
003A ; // Wait for data to be received
003A ; while ( !(UCSRA & (UCSRA&0x80)) );
003A 8BB1 in R24,0xb
003C 8078 andi R24,128
003E 2BB0 in R2,0xb
0040 2822 and R2,R24
0042 D9F3 breq L8
0044 .dbline 68
0044 ; //Get and return received data from buffer
0044 ; return UDR; //Receive 8 data bits
0044 0CB1 in R16,0xc
0046 .dbline -2
0046 L7:
0046 .dbline 0 ; func end
0046 0895 ret
0048 .dbend
0048 .dbfunc e delayms _delayms fV
0048 ; i -> R20,R21
0048 ; j -> R22,R23
0048 ; ms -> R16,R17
.even
0048 _delayms::
0048 00D0 rcall push_gset2
004A .dbline -1
004A .dbline 92
004A ; }
004A ;
004A ; /*
004A ; unsigned int USART_Receive( void )
004A ; {
004A ; unsigned char status, resh, resl;
004A ; // Wait for data to be received
004A ; while ( !(UCSRA & (1<<RXC)) );
004A ; // Get status and 9th bit, then data
004A ; // from buffer
004A ; status = UCSRA;
004A ; resh = UCSRB;
004A ; resl = UDR;
004A ; // If error, return -1
004A ; if ( status & (1<<FE)|(1<<DOR)|(1<<UPE) )
004A ; return -1;
004A ; // Filter the 9th bit, then return
004A ; resh = (resh >> 1) & 0x01;
004A ; return ((resh << 8) | resl); //Receive 9 data bits
004A ; }
004A ; */
004A ;
004A ; void delayms(uint ms)
004A ; {
004A .dbline 94
004A ; uint i,j;
004A ; for(i=0;i<ms;i++)
004A 4427 clr R20
004C 5527 clr R21
004E 0BC0 rjmp L15
0050 L12:
0050 .dbline 95
0050 ; {
0050 .dbline 96
0050 6627 clr R22
0052 7727 clr R23
0054 02C0 rjmp L19
0056 L16:
0056 .dbline 96
0056 L17:
0056 .dbline 96
0056 6F5F subi R22,255 ; offset = 1
0058 7F4F sbci R23,255
005A L19:
005A .dbline 96
005A 6537 cpi R22,117
005C E4E0 ldi R30,4
005E 7E07 cpc R23,R30
0060 D0F3 brlo L16
0062 .dbline 97
0062 L13:
0062 .dbline 94
0062 4F5F subi R20,255 ; offset = 1
0064 5F4F sbci R21,255
0066 L15:
0066 .dbline 94
0066 4017 cp R20,R16
0068 5107 cpc R21,R17
006A 90F3 brlo L12
006C .dbline -2
006C L11:
006C 00D0 rcall pop_gset2
006E .dbline 0 ; func end
006E 0895 ret
0070 .dbsym r i 20 i
0070 .dbsym r j 22 i
0070 .dbsym r ms 16 i
0070 .dbend
0070 .dbfunc e delayus _delayus fV
0070 ; i -> R20,R21
0070 ; us -> R16,R17
.even
0070 _delayus::
0070 00D0 rcall push_gset1
0072 .dbline -1
0072 .dbline 100
0072 ; for(j=0;j<1141;j++);
0072 ; }
0072 ; }
0072 ; void delayus(uint us)
0072 ; {
0072 .dbline 104
0072 ;
0072 ; uint i;
0072 ;
0072 ; for(i=0;i<us;i++)
0072 4427 clr R20
0074 5527 clr R21
0076 06C0 rjmp L24
0078 L21:
0078 .dbline 105
0078 .dbline 106
0078 0000 nop
007A .dbline 106
007A 0000 nop
007C .dbline 106
007C 0000 nop
007E .dbline 106
007E 0000 nop
0080 .dbline 107
0080 L22:
0080 .dbline 104
0080 4F5F subi R20,255 ; offset = 1
0082 5F4F sbci R21,255
0084 L24:
0084 .dbline 104
0084 4017 cp R20,R16
0086 5107 cpc R21,R17
0088 B8F3 brlo L21
008A .dbline -2
008A L20:
008A 00D0 rcall pop_gset1
008C .dbline 0 ; func end
008C 0895 ret
008E .dbsym r i 20 i
008E .dbsym r us 16 i
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